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首頁 >EP1C6>規(guī)格書列表

型號(hào)	下載訂購	功能描述	制造商上傳企業(yè)	LOGO
EP1C6Q144C8ES	文件：1.35316 Mbytes Page：104 Pages	Cyclone FPGA Family Data Sheet Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：1.35316 Mbytes 頁數(shù)：104 Pages	ALTERA 阿爾特	ALTERA
EP1C6Q144I6ES	文件：1.35316 Mbytes Page：104 Pages	Cyclone FPGA Family Data Sheet Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：1.35316 Mbytes 頁數(shù)：104 Pages	ALTERA 阿爾特	ALTERA
EP1C6Q144I7ES	文件：1.35316 Mbytes Page：104 Pages	Cyclone FPGA Family Data Sheet Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：1.35316 Mbytes 頁數(shù)：104 Pages	ALTERA 阿爾特	ALTERA
EP1C6Q144I8ES	文件：1.35316 Mbytes Page：104 Pages	Cyclone FPGA Family Data Sheet Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：1.35316 Mbytes 頁數(shù)：104 Pages	ALTERA 阿爾特	ALTERA
EP1C6Q240C6ES	文件：1.35316 Mbytes Page：104 Pages	Cyclone FPGA Family Data Sheet Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：1.35316 Mbytes 頁數(shù)：104 Pages	ALTERA 阿爾特	ALTERA
EP1C6Q240C7ES	文件：1.35316 Mbytes Page：104 Pages	Cyclone FPGA Family Data Sheet Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：1.35316 Mbytes 頁數(shù)：104 Pages	ALTERA 阿爾特	ALTERA
EP1C6Q240C8ES	文件：1.35316 Mbytes Page：104 Pages	Cyclone FPGA Family Data Sheet Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：1.35316 Mbytes 頁數(shù)：104 Pages	ALTERA 阿爾特	ALTERA
EP1C6Q240C8N	文件：706.63 Kbytes Page：106 Pages	Supports configuration through low-cost serial configuration device Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：706.63 Kbytes 頁數(shù)：106 Pages	ALTERA 阿爾特	ALTERA
EP1C6Q240I6ES	文件：1.35316 Mbytes Page：104 Pages	Cyclone FPGA Family Data Sheet Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：1.35316 Mbytes 頁數(shù)：104 Pages	ALTERA 阿爾特	ALTERA
EP1C6Q240I7ES	文件：1.35316 Mbytes Page：104 Pages	Cyclone FPGA Family Data Sheet Introduction The Cyclone? field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) 文件：1.35316 Mbytes 頁數(shù)：104 Pages	ALTERA 阿爾特	ALTERA

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供應(yīng)商	型號(hào)	品牌	批號(hào)	封裝	庫存	備注	價(jià)格
深圳市得捷芯城科技有限公司	EP1C6	ALTERA(阿爾特拉)	25+	標(biāo)準(zhǔn)封裝	10163	我們只是原廠的搬運(yùn)工	詢價(jià)
柒號(hào)芯城電子商務(wù)(深圳)有限公司	EP1C6	ALTERA	2024+	N/A	70000	柒號(hào)只做原裝現(xiàn)貨價(jià)秒殺全網(wǎng)	詢價(jià)
深圳市安富世紀(jì)電子有限公司	EP1C6	N/A	23+		80000	專注配單,只做原裝進(jìn)口現(xiàn)貨	詢價(jià)
深圳市萬佳誠業(yè)科技有限公司	EP1C6	ALTERA(阿爾特拉)	23+		15000	專業(yè)幫助客戶找貨配單,誠信可靠!	詢價(jià)
深圳市福田區(qū)綠盛電子商行	EP1C6F256I7N	ALTERA	2015+	SOP/DIP	19889	一級(jí)代理原裝現(xiàn)貨,特價(jià)熱賣!	詢價(jià)
齊創(chuàng)科技(上海,北京,青島)有限公司	EP1C6T144C8N	ALTERA	23+	QFP-144	5000	原裝正品,假一罰十	詢價(jià)
深圳市銓博晟科技有限公司	EP1C6T144I7N	Intel/Altera	23+		52500	只有原裝/價(jià)格優(yōu)勢/全線可訂	詢價(jià)
深圳市凱睿晟科技有限公司	EP1C6T144I7N	ALTERA/阿爾特拉	21+	TQFP	20000	百域芯優(yōu)勢實(shí)單必成可開13點(diǎn)增值稅	詢價(jià)
深圳市信科微科技有限公司	EP1C6F256I7			BGA	10000		詢價(jià)
深圳市柯爾基電子有限公司	EP1C6T144I7	ALTERA	23+24	TQFP	9480	專營ALTERA原裝可編程邏輯器件,優(yōu)勢熱賣	詢價(jià)

更多EP1C6供應(yīng)商更新時(shí)間2026-1-21 15:02:00

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