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                >絲印反查>DS90LV032ATM
                
    
            
    
                
    
                    
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    DS90LV032ATM/NOPB
    絲印：DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    DS90LV032ATM/NOPB.B
    絲印：DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    DS90LV032ATMSLASHNOPB
    絲?。?strong>DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    DS90LV032ATMSLASHNOPB.B
    絲?。?strong>DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    DS90LV032ATMX/NOPB
    絲印：DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    DS90LV032ATMX/NOPB.B
    絲印：DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    DS90LV032ATMXSLASHNOPB
    絲?。?strong>DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    DS90LV032ATMXSLASHNOPB.B
    絲?。?strong>DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    DS90LV032ATM/NOPB
    絲?。?strong>DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    DS90LV032ATM/NOPB.B
    絲印：DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver
    
1 Features
1? >400 Mbps (200 MHz) Switching Rates
? 0.1-ns Channel-to-Channel Skew (Typical)
? 0.1-ns Differential Skew (Typical)
? 3.3-ns Maximum Propagation Delay
? 3.3-V Power Supply Design
? Power Down High Impedance on LVDS Inputs
? Low Power Design (40 mW at 3.3 V Static)
? Interoper
    文件：667.06 Kbytes 頁數(shù)：26 Pages
    TI
    德州儀器
    

    
            
    
		
    
            
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