3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：900.37 Kbytes 頁數(shù)：15 Pages

TI

德州儀器

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：922.04 Kbytes 頁數(shù)：15 Pages

TI

德州儀器

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：922.04 Kbytes 頁數(shù)：15 Pages

TI

德州儀器

+3.3V 下降沿 LVDS 發(fā)送器 18 位平板顯示器 (FPD) 鏈路 - 65MHz

The DS90CF363B transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled ? No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered.\n? Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or ?5% Down Spread.\n?;

TI

德州儀器

Package：48-TFSOP（0.240"，6.10mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 專用 描述：IC INTERFACE SPECIALIZED 48TSSOP

TI

德州儀器

Package：48-TFSOP（0.240"，6.10mm 寬）；包裝：管件 類別：集成電路（IC） 專用 描述：IC INTERFACE SPECIALIZED 48TSSOP

TI

德州儀器