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          型號下載 訂購功能描述制造商 上傳企業(yè)LOGO
          
                    
          DS90C402M/NOPB
          絲印：DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          DS90C402M/NOPB.A
          絲?。?strong>DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          DS90C402MSLASHNOPB
          絲?。?strong>DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          DS90C402MSLASHNOPB.A
          絲?。?strong>DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          DS90C402MX/NOPB
          絲?。?strong>DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          DS90C402MX/NOPB.A
          絲?。?strong>DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          DS90C402MXSLASHNOPB
          絲?。?strong>DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          DS90C402MXSLASHNOPB.A
          絲?。?strong>DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          DS90C402M/NOPB
          絲?。?strong>DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          DS90C402M/NOPB.A
          絲印：DS90C402M；Package：SOIC；DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
          
1FEATURES
2? Ultra Low Power Dissipation
? Operates above 155.5 Mbps
? Standard TIA/EIA-644
? 8 Lead SOIC Package saves PCB space
? V CM ±1V center around 1.2V
? ±100 mV Receiver Sensitivity

DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power ap
          文件：518.429 Kbytes 頁數(shù)：17 Pages
          TI
          德州儀器
          

          
            
          
		
          
            
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            更新時間2026-1-20 11:00:00
        
          
        
          
          
          
            
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