Quad NOR Unified Bus Receiver

文件：108.79 Kbytes 頁數(shù)：4 Pages

NSC

國半

Quad NOR Unified Bus Receiver

General Description\nThe DS7836/DS8836 are quad 2-input receivers designed for use in bus organized data transmission systems interconnected by terminated 120Ximpedance lines. The external termination is intended to be 180Xresistor from the bus to the a5V logic supply together with a 390Xresistor fr Low input current with normal VCC or VCC = 0V (15 mA typ)\nBuilt-in input hysteresis (1V typ)\nHigh noise immunity (2V typ)\nTemperature-insensitive input thresholds track bus logic levels\nTTL compatible output\nMatched, optimized noise immunity for ``1'' and ``0'' levels\nHigh speed (18 ns typ)?;

TI

德州儀器

Quad NOR Unified Bus Receiver

文件：108.79 Kbytes 頁數(shù)：4 Pages

NSC

國半

0.5A Low Power LDO

文件：1.11454 Mbytes 頁數(shù)：13 Pages

HMSEMI

華之美半導體

0.5A Low Power LDO

文件：1.11454 Mbytes 頁數(shù)：13 Pages

HMSEMI

華之美半導體

0.5A Low Power LDO

文件：1.11454 Mbytes 頁數(shù)：13 Pages

HMSEMI

華之美半導體