8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock

文件：95.64 Kbytes 頁數(shù)：6 Pages

MAXIM

美信

8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock

文件：224 Kbytes 頁數(shù)：6 Pages

MAXIM

美信

SyncE and IEEE 1588

The DS31408 is a flexible, high-performance timing IC for diverse frequency conversion and frequency synthesis applications. On each of its eight input clocks and 14 output clocks, the device can accept or generate nearly any frequency between 2kHz and 750MHz. The device offers two independent DPLLs Eight Input Clocks\n? Differential or CMOS/TTL Format\n? Any Frequency from 2kHz to 750MHz\n? Fractional Scaling for 64B/66B and FEC Scaling (e.g., 64/66, 237/255, 238/255) or Any Other Downscaling Requirement\n? Continuous Input Clock Quality Monitoring\nTwo High-Performance DPLLs\n? Hitless Refere;

Microchip

微芯科技

8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock

文件：95.64 Kbytes 頁數(shù)：6 Pages

MAXIM

美信

8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock

文件：224 Kbytes 頁數(shù)：6 Pages

MAXIM

美信

8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock

文件：95.64 Kbytes 頁數(shù)：6 Pages

MAXIM

美信

8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock

文件：95.64 Kbytes 頁數(shù)：6 Pages

MAXIM

美信

8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock

文件：224 Kbytes 頁數(shù)：6 Pages

MAXIM

美信

GPS Timing

Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock

Microchip

微芯科技

包裝：盒 功能：PLL 類別：開發(fā)板，套件，編程器 評估和演示板及套件 描述：KIT DEMO DS31408

MICROSEMI

美高森美