DS25BR150 3.125 Gbps LVDS Buffer

1FEATURES 2? DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation ? On-Chip 100 Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space ? 7 kV ESD on LVDS I/O Pins Protects Adjoining Components ? Small 3 mm x

文件：451.42 Kbytes 頁數(shù)：16 Pages

TI

德州儀器

DS25BR100 / DS25BR101 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2? DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation ? Receive Equalization Reduces ISI Jitter Due to Media Loss ? Transmit Pre-Emphasis Drives Lossy Backplanes and Cables ? On-Chip 100Ω Input and Output Termination: – Minimizes Insertion and Return Losses – R

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TI

德州儀器

3.125 Gbps LVDS Buffer

文件：791.12 Kbytes 頁數(shù)：15 Pages

TI

德州儀器

3.125 Gbps LVDS Buffer

文件：397.17 Kbytes 頁數(shù)：12 Pages

NSC

國半

3.125Gbps LVDS 緩沖器

The DS25BR150 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over printed circuit boards and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.The DS25BR150 is a buffer/repeater with very low power consump ? DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation\n? On-Chip 100 ? Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space\n? 7 kV ESD on LVDS I/O Pins Protects Adjoining Components\n? Small 3 mm x 3 mm WSON-8 Space S;

TI

德州儀器

絲印：2R150；Package：WSON；DS25BR150 3.125 Gbps LVDS Buffer

1FEATURES 2? DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation ? On-Chip 100 Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space ? 7 kV ESD on LVDS I/O Pins Protects Adjoining Components ? Small 3 mm x

文件：451.42 Kbytes 頁數(shù)：16 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/2r150/marking.html">2R150；Package：WSON；DS25BR150 3.125 Gbps LVDS Buffer

1FEATURES 2? DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation ? On-Chip 100 Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space ? 7 kV ESD on LVDS I/O Pins Protects Adjoining Components ? Small 3 mm x

文件：451.42 Kbytes 頁數(shù)：16 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/2r150/marking.html">2R150；Package：WSON；DS25BR150 3.125 Gbps LVDS Buffer

1FEATURES 2? DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation ? On-Chip 100 Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space ? 7 kV ESD on LVDS I/O Pins Protects Adjoining Components ? Small 3 mm x

文件：451.42 Kbytes 頁數(shù)：16 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/2r150/marking.html">2R150；Package：WSON；DS25BR150 3.125 Gbps LVDS Buffer

1FEATURES 2? DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation ? On-Chip 100 Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space ? 7 kV ESD on LVDS I/O Pins Protects Adjoining Components ? Small 3 mm x

文件：451.42 Kbytes 頁數(shù)：16 Pages

TI

德州儀器

3.125 Gbps LVDS Buffer

文件：397.17 Kbytes 頁數(shù)：12 Pages

NSC

國半