E1 Single-Chip Transceiver

DESCRIPTION The DS2153Q T1 Single-Chip Transceiver (SCT) contains all of the necessary functions for connection to E1 lines. The onboard clock/data recovery circuitry coverts the AMI/HDB3 E1 waveforms to a NRZ serial stream. The DS2153 automatically adjusts to E1 22 AWG (0.6 mm) twisted-pair cabl

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DALLAS

E1 Single-Chip Transceiver

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MAXIM

美信

E1單芯片收發(fā)器

The DS2153Q is a first-generation line interface unit for E1 lines that pioneered single-chip integration of multiple functions combining long- and short-haul and framing functionality with dual elastic stores and an 8-bit parallel control port. It is pin- and function-compatible with the DS2151Q, i \n? Complete E1 (CEPT) PCM-30/ISDN-PRI transceiver \n? LIU for clock/data recovery and waveshaping \n? 32-bit or 128-bit jitter attenuator \n? Generates line build-outs for both 120Ω and 75Ω lines \n? Frames to FAS, CAS, and CRC4 formats \n? Dual elastic buffers connect to backplanes up to 8.192MHz ;

ADI

亞德諾

Package：44-LCC（J 形引線）；包裝：管件 功能：單芯片收發(fā)器 類別：集成電路（IC） 電信 描述：IC TELECOM INTERFACE 44PLCC

AD

亞德諾

Package：44-LCC（J 形引線）；包裝：卷帶（TR） 功能：單芯片收發(fā)器 類別：集成電路（IC） 電信 描述：IC TELECOM INTERFACE 44PLCC

AD

亞德諾

Package：44-LCC（J 形引線）；包裝：托盤 功能：單芯片收發(fā)器 類別：集成電路（IC） 電信 描述：IC TELECOM INTERFACE 44PLCC

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