3-STATE Octal Buffer

General Description These devices provide eight, two-input buffers in each package. All employ low-power-Schottky TTL technology. One of the two inputs to each buffer is used as a control line to gate the output into the high-impedance state, while the other input passes the data through the bu

文件：71.57 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體

3-STATE Octal Buffer

ONSEMI

安森美半導(dǎo)體

3-STATE Octal Buffer

General Description These devices provide eight, two-input buffers in each package. All employ low-power-Schottky TTL technology. One of the two inputs to each buffer is used as a control line to gate the output into the high-impedance state, while the other input passes the data through the bu

文件：71.57 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體

3-STATE Octal Buffer

General Description These devices provide eight, two-input buffers in each package. All employ low-power-Schottky TTL technology. One of the two inputs to each buffer is used as a control line to gate the output into the high-impedance state, while the other input passes the data through the bu

文件：71.57 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體

3-STATE Octal Buffer

General Description These devices provide eight, two-input buffers in each package. All employ low-power-Schottky TTL technology. One of the two inputs to each buffer is used as a control line to gate the output into the high-impedance state, while the other input passes the data through the bu

文件：71.57 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體

TRI-STATE Octal Buffer

文件：118.09 Kbytes 頁數(shù)：6 Pages

NSC

國半

TRI-STATE Octal Buffer

文件：118.09 Kbytes 頁數(shù)：6 Pages

NSC

國半

TRI-STATE Octal Buffer

文件：118.09 Kbytes 頁數(shù)：6 Pages

NSC

國半

Three-State Octal Buffers

文件：230.32 Kbytes 頁數(shù)：4 Pages

AMD

超威半導(dǎo)體

Three-State Octal Buffers

文件：230.32 Kbytes 頁數(shù)：4 Pages

AMD

超威半導(dǎo)體