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          首頁 >絲印反查>DA60004

          型號(hào)下載 訂購功能描述制造商 上傳企業(yè)LOGO

          DAC60004IDMDR

          絲印:DA60004;Package:VSON(DMD);DACx0004, Quad 16-,14-,12-Bit, 1 LSB INL, Buffered, Voltage-Output Digital-to-Analog Converters

          1 Features 1? True 16-Bit Performance: 1 LSB INL/DNL (Max) ? Ultra Low Glitch Energy: 1 nV-s ? Wide Power-Supply Range: 2.7 V to 5.5 V ? Output Buffer with Rail-to-Rail Operation ? Current Consumption: 1 mA/Channel ? 50-MHz, 4- or 3-Wire SPI Compatible Interface ? SDO Pin for Readback and D

          文件:2.12801 Mbytes 頁數(shù):44 Pages

          TI

          德州儀器

          DAC60004IDMDR.B

          絲?。?strong>DA60004;Package:VSON(DMD);DACx0004, Quad 16-,14-,12-Bit, 1 LSB INL, Buffered, Voltage-Output Digital-to-Analog Converters

          1 Features 1? True 16-Bit Performance: 1 LSB INL/DNL (Max) ? Ultra Low Glitch Energy: 1 nV-s ? Wide Power-Supply Range: 2.7 V to 5.5 V ? Output Buffer with Rail-to-Rail Operation ? Current Consumption: 1 mA/Channel ? 50-MHz, 4- or 3-Wire SPI Compatible Interface ? SDO Pin for Readback and D

          文件:2.12801 Mbytes 頁數(shù):44 Pages

          TI

          德州儀器

          DAC60004IDMDT

          絲印:DA60004;Package:VSON(DMD);DACx0004, Quad 16-,14-,12-Bit, 1 LSB INL, Buffered, Voltage-Output Digital-to-Analog Converters

          1 Features 1? True 16-Bit Performance: 1 LSB INL/DNL (Max) ? Ultra Low Glitch Energy: 1 nV-s ? Wide Power-Supply Range: 2.7 V to 5.5 V ? Output Buffer with Rail-to-Rail Operation ? Current Consumption: 1 mA/Channel ? 50-MHz, 4- or 3-Wire SPI Compatible Interface ? SDO Pin for Readback and D

          文件:2.12801 Mbytes 頁數(shù):44 Pages

          TI

          德州儀器

          DAC60004IDMDT.B

          絲?。?strong>DA60004;Package:VSON(DMD);DACx0004, Quad 16-,14-,12-Bit, 1 LSB INL, Buffered, Voltage-Output Digital-to-Analog Converters

          1 Features 1? True 16-Bit Performance: 1 LSB INL/DNL (Max) ? Ultra Low Glitch Energy: 1 nV-s ? Wide Power-Supply Range: 2.7 V to 5.5 V ? Output Buffer with Rail-to-Rail Operation ? Current Consumption: 1 mA/Channel ? 50-MHz, 4- or 3-Wire SPI Compatible Interface ? SDO Pin for Readback and D

          文件:2.12801 Mbytes 頁數(shù):44 Pages

          TI

          德州儀器

          DAC60004IPW

          絲印:DA60004;Package:TSSOP(PW);DACx0004, Quad 16-,14-,12-Bit, 1 LSB INL, Buffered, Voltage-Output Digital-to-Analog Converters

          1 Features 1? True 16-Bit Performance: 1 LSB INL/DNL (Max) ? Ultra Low Glitch Energy: 1 nV-s ? Wide Power-Supply Range: 2.7 V to 5.5 V ? Output Buffer with Rail-to-Rail Operation ? Current Consumption: 1 mA/Channel ? 50-MHz, 4- or 3-Wire SPI Compatible Interface ? SDO Pin for Readback and D

          文件:2.12801 Mbytes 頁數(shù):44 Pages

          TI

          德州儀器

          DAC60004IPW.B

          絲?。?strong>DA60004;Package:TSSOP(PW);DACx0004, Quad 16-,14-,12-Bit, 1 LSB INL, Buffered, Voltage-Output Digital-to-Analog Converters

          1 Features 1? True 16-Bit Performance: 1 LSB INL/DNL (Max) ? Ultra Low Glitch Energy: 1 nV-s ? Wide Power-Supply Range: 2.7 V to 5.5 V ? Output Buffer with Rail-to-Rail Operation ? Current Consumption: 1 mA/Channel ? 50-MHz, 4- or 3-Wire SPI Compatible Interface ? SDO Pin for Readback and D

          文件:2.12801 Mbytes 頁數(shù):44 Pages

          TI

          德州儀器

          DAC60004IPWR

          絲印:DA60004;Package:TSSOP(PW);DACx0004, Quad 16-,14-,12-Bit, 1 LSB INL, Buffered, Voltage-Output Digital-to-Analog Converters

          1 Features 1? True 16-Bit Performance: 1 LSB INL/DNL (Max) ? Ultra Low Glitch Energy: 1 nV-s ? Wide Power-Supply Range: 2.7 V to 5.5 V ? Output Buffer with Rail-to-Rail Operation ? Current Consumption: 1 mA/Channel ? 50-MHz, 4- or 3-Wire SPI Compatible Interface ? SDO Pin for Readback and D

          文件:2.12801 Mbytes 頁數(shù):44 Pages

          TI

          德州儀器

          DAC60004IPWR.B

          絲?。?strong>DA60004;Package:TSSOP(PW);DACx0004, Quad 16-,14-,12-Bit, 1 LSB INL, Buffered, Voltage-Output Digital-to-Analog Converters

          1 Features 1? True 16-Bit Performance: 1 LSB INL/DNL (Max) ? Ultra Low Glitch Energy: 1 nV-s ? Wide Power-Supply Range: 2.7 V to 5.5 V ? Output Buffer with Rail-to-Rail Operation ? Current Consumption: 1 mA/Channel ? 50-MHz, 4- or 3-Wire SPI Compatible Interface ? SDO Pin for Readback and D

          文件:2.12801 Mbytes 頁數(shù):44 Pages

          TI

          德州儀器

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          更多DA60004供應(yīng)商 更新時(shí)間2026-1-18 14:26:00
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