112dB 192kHz 24-BIT SCH DAC

GENERAL DESCRIPTION The ALD555 timer is a high performance monolithic timing circuit built with advanced silicon gate CMOS technology. It offers the benefits of high input impedance, thereby allowing smaller timing capacitors and longer timing cycle; high speed, with typical cycle time of 500ns;

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ALD

定時器電路

D555是一塊精確時間脈沖控制電路。當(dāng)工作在單穩(wěn)態(tài)模式時，延遲可通過外接的一只電阻和一只電容來控制；當(dāng)工作在多諧振蕩模式時，頻率和占空比可通過外接的兩只電阻和一只電容來控制。\n ·輸出電流大（200mA）\n·占空比可調(diào)\n·溫度穩(wěn)定性高：0.005%/ C\n·定時可從微秒級至小時級\n·關(guān)閉時間小于2微秒\n·封裝形式：DIP8、SOP8;

Silicore

芯谷科技

MOS INTEGRATED CIRCUIT

SEMICONDUCTOR SELECTION GUIDE Microcomputer IC Memory Semi-Custom IC Particular Purpose IC General Purpose Linear IC Transistor / Diode / Thyristor Microwave Device / Consumer Use High Frequency Device Optical Device Packages Index (Quick Reference by Type N

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NEC

瑞薩

MOS INTEGRATED CIRCUIT

Renesas

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