CMOS Programmable Peripheral Interface

The Intersil 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins wh

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INTERSIL

CMOS Programmable Peripheral Interface

The Intersil 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins wh

文件：560.88 Kbytes 頁數(shù)：29 Pages

INTERSIL

CMOS Programmable Peripheral Interface

The Intersil 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins wh

文件：560.88 Kbytes 頁數(shù)：29 Pages

INTERSIL

CMOS Priority Interrupt Controller

The Intersil 82C59A is a high performance CMOS Priority Interrupt Controller manufactured using an advanced 2μm CMOS process. The 82C59A is designed to relieve the system CPU from the task of polling in a multilevel priority system. The high speed and industry standard configuration of the 82C59A

文件：152.11 Kbytes 頁數(shù)：20 Pages

INTERSIL

CMOS Priority Interrupt Controller

The Intersil 82C59A is a high performance CMOS Priority Interrupt Controller manufactured using an advanced 2μm CMOS process. The 82C59A is designed to relieve the system CPU from the task of polling in a multilevel priority system. The high speed and industry standard configuration of the 82C59A

文件：152.11 Kbytes 頁數(shù)：20 Pages

INTERSIL

CMOS Priority Interrupt Controller

The Intersil 82C59A is a high performance CMOS Priority Interrupt Controller manufactured using an advanced 2μm CMOS process. The 82C59A is designed to relieve the system CPU from the task of polling in a multilevel priority system. The high speed and industry standard configuration of the 82C59A

文件：152.11 Kbytes 頁數(shù)：20 Pages

INTERSIL

CMOS Octal Latching Bus Driver

Description The Intersil 82C82 is a high performance CMOS Octal Latching Buffer manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). The 82C82 provides an eight-bit parallel latch/buffer in a 20 pin package. The active high strobe (STB) input allows transparent trans

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INTERSIL

CMOS Octal Latching Inverting Bus Driver

Description The Intersil 82C83H is a high performance CMOS Octal Latching Buffer manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). The 82C83H provides an 8-bit parallel latch/buffer in a 20 lead pin package. The active high strobe (STB) input allows transparent transfe

文件：105.77 Kbytes 頁數(shù)：6 Pages

INTERSIL

CMOS Clock Generator Driver

The Intersil 82C84A is a high performance CMOS Clock Generator-driver which is designed to service the requirements of both CMOS and NMOS microprocessors such as the 80C86, 80C88, 8086 and the 8088. The chip contains a crystal controlled oscillator, a divide-by-three counter and complete “Ready” s

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INTERSIL

絲印：CS82C84A；Package：20LdPLCC；CMOS Clock Generator Driver

CMOS Clock Generator Driver The Intersil 82C84A is a high performance CMOS Clock Generator-driver which is designed to service the requirements of both CMOS and NMOS microprocessors such as the 80C86, 80C88, 8086 and the 8088. The chip contains a crystal controlled oscillator, a divide-by-three c

文件：596.52 Kbytes 頁數(shù)：13 Pages

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