| 型號(hào) | 下載 訂購(gòu) | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
絲?。?a target="_blank" title="Marking" href="/cl857/marking.html">CL857；Package：TSSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por 文件：239.16 Kbytes 頁(yè)數(shù)：9 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/cl861/marking.html">CL861；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH 5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr 文件：697.46 Kbytes 頁(yè)數(shù)：19 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/cl861/marking.html">CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH 5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr 文件：698.2 Kbytes 頁(yè)數(shù)：19 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/cl861/marking.html">CL861；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH * 5-? Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II 文件：695.31 Kbytes 頁(yè)數(shù)：19 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/cl861/marking.html">CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH 5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr 文件：698.2 Kbytes 頁(yè)數(shù)：19 Pages | TI 德州儀器 | TI | ||
絲印：CL861；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH 5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr 文件：697.46 Kbytes 頁(yè)數(shù)：19 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/cl861/marking.html">CL861；Package：TSSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH 5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr 文件：697.46 Kbytes 頁(yè)數(shù)：19 Pages | TI 德州儀器 | TI | ||
絲印：CL861；Package：TSSOP(PW)；LOW-VOLTAGE 10-BIT FET BUS SWITCH 5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr 文件：698.2 Kbytes 頁(yè)數(shù)：19 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/cl861/marking.html">CL861；Package：TSSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH * 5-? Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II 文件：695.31 Kbytes 頁(yè)數(shù)：19 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/cl861/marking.html">CL861；Package：TSSOP(PW)；LOW-VOLTAGE 10-BIT FET BUS SWITCH 5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr 文件：698.2 Kbytes 頁(yè)數(shù)：19 Pages | TI 德州儀器 | TI |
詳細(xì)參數(shù)
- 型號(hào)：
CL8
- 制造商：
ONSEMI
- 制造商全稱(chēng)：
ON Semiconductor
- 功能描述：
Zener Voltage Regulators 500 mW SODa??123 Surface Mount
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
ON/安森美 |
23+ |
SOD-123 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢(xún)價(jià) | ||
ON/安森美 |
04+ |
SOD-123 |
1000 |
進(jìn)口原裝現(xiàn)貨假一賠萬(wàn)力挺實(shí)單 |
詢(xún)價(jià) | ||
ON |
22+ |
SOD-123 |
20000 |
公司只做原裝 品質(zhì)保障 |
詢(xún)價(jià) | ||
24+ |
5000 |
公司存貨 |
詢(xún)價(jià) | ||||
ONSEMICONDU |
24+ |
原裝進(jìn)口原廠原包接受訂貨 |
17599 |
原裝現(xiàn)貨假一罰十 |
詢(xún)價(jià) | ||
ON/安森美 |
23+ |
SOD-123 |
24190 |
原裝正品代理渠道價(jià)格優(yōu)勢(shì) |
詢(xún)價(jià) | ||
ON/安森美 |
21+ |
SOD-123 |
30000 |
優(yōu)勢(shì)供應(yīng) 實(shí)單必成 可13點(diǎn)增值稅 |
詢(xún)價(jià) | ||
ON |
24+ |
SOD123-2 |
2600 |
原裝現(xiàn)貨假一賠十 |
詢(xún)價(jià) | ||
ON/安森美 |
21+ |
NA |
12820 |
只做原裝,質(zhì)量保證 |
詢(xún)價(jià) | ||
ON |
26+ |
Sot-153 |
86720 |
全新原裝正品價(jià)格最實(shí)惠 承諾假一賠百 |
詢(xún)價(jià) |
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