絲?。?strong>CL8；Package：DFN1610；Transient Voltage Suppressors for ESD Protection

Features 100 ~ 234 Watts Peak Pulse Power per Line (tp=8/20μs) Protects one I/O line (Bidirectional) Working voltages: 3.3 ~ 24V Low leakage current IEC61000-4-4 (EFT) 40A (5/50ηs) IEC61000-4-2 (ESD) ±30kV (air), ±30kV (contact) : 3.3 ~ 15V IEC61000-4-2 (ESD) ± 15kV (air), ± 8kV (contact) :

文件：2.92008 Mbytes 頁數(shù)：4 Pages

UNSEMI

優(yōu)恩半導體

絲?。?strong>CL8；Package：DFN1610；Transient Voltage Suppressors for ESD Protection

Features Moisture Sensitivity Level (MSL -1) AEC-Q101 qualified 100~234 Watts Peak Pulse Power per Line (tp=8/20μs) Protects one bidirectional I/O line Working Voltages: 3.3V~24V Low clamping voltage Low leakage current IEC61000-4-2 (ESD) ±30kV (air), ±30kV (contact): 3.3V~15V IEC61000-4-

文件：2.7572 Mbytes 頁數(shù)：4 Pages

UNSEMI

優(yōu)恩半導體

絲?。?strong>CL8；Package：SOD-123；Zener Voltage Regulators 500 mW SOD-123 Surface Mount

Three complete series of Zener diodes are offered in the convenient, surface mount plastic SOD?123 package. These devices provide a convenient alternative to the leadless 34?package style. Specification Features ? 500 mW Rating on FR?4 or FR?5 Board ? Wide Zener Reverse Voltage Range ? 2.4

文件：157.7 Kbytes 頁數(shù)：6 Pages

ONSEMI

安森美半導體

絲?。?strong>CL8；Package：DFN1610TN；ULTRA LOW CAPACITANCE TVS DIODE ARRAY

文件：1.57975 Mbytes 頁數(shù)：3 Pages

LEIDITECH

雷卯電子

絲?。?a target="_blank" title="Marking" href="/cl861/marking.html">CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：698.2 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲印：CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：698.2 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cl861/marking.html">CL861；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：697.46 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cl857/marking.html">CL857；Package：QSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS

Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por

文件：239.16 Kbytes 頁數(shù)：9 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cl857/marking.html">CL857；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS

Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por

文件：239.16 Kbytes 頁數(shù)：9 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cl857/marking.html">CL857；Package：TSSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS

Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por

文件：239.16 Kbytes 頁數(shù)：9 Pages

TI

德州儀器