Fractional-N Clock Multiplier

General Description The CS2100-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2100-CP is based on a hybrid ana log-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digita

文件：412.58 Kbytes 頁數(shù)：32 Pages

CIRRUS

凌云邏輯

Fractional-N Clock Synthesizer & Clock Multiplier

The CS2000-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2000-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture

文件：447.84 Kbytes 頁數(shù)：36 Pages

CIRRUS

凌云邏輯

Fractional-N Clock Multiplier

General Description The CS2100-OTP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2100-OTP is based on a hybrid analogdigital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital

文件：542.19 Kbytes 頁數(shù)：28 Pages

CIRRUS

凌云邏輯

Fractional-N Frequency Synthesizer

文件：332 Kbytes 頁數(shù)：22 Pages

CIRRUS

凌云邏輯

Fractional-N Frequency Synthesizer

文件：326.13 Kbytes 頁數(shù)：26 Pages

CIRRUS

凌云邏輯

Fractional-N Clock Synthesizer & Clock Multiplier

文件：596.19 Kbytes 頁數(shù)：30 Pages

CIRRUS

凌云邏輯

Fractional-N Clock Synthesizer & Clock Multiplier

CirrusLogic

凌云邏輯