絲?。?a target="_blank" title="Marking" href="/ajw/marking.html">AJW；Package：VQFN；CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

1 Features 1? Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output ? Programmable Output Divider for Both LVPECL and LVCMOS Outputs ? 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise ? 3.3-V Power Suppl

文件：1.15535 Mbytes 頁數(shù)：30 Pages

TI

德州儀器

CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O ADDITIONAL LVCMOS OUTPUT

文件：695.86 Kbytes 頁數(shù)：22 Pages

TI

德州儀器

CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

文件：1.42326 Mbytes 頁數(shù)：30 Pages

TI

德州儀器

CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

1 Features 1? Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output ? Programmable Output Divider for Both LVPECL and LVCMOS Outputs ? 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise ? 3.3-V Power Suppl

文件：1.15535 Mbytes 頁數(shù)：30 Pages

TI

德州儀器