PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER

1FEATURES · High-Performance 3:6 PLL-Based Clock Synthesizer/Multiplier/Divider · User-Programmable PLL Frequencies · EEPROM Programming Without the Need to Apply High Programming Voltage · Easy In-Circuit Programming via SMBus Data Interface · Wide PLL Divider Ratio Allows 0-ppm Output C

文件：1.22229 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER

文件：1.030829 Mbytes 頁數(shù)：40 Pages

TI

德州儀器

PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER

文件：1.64453 Mbytes 頁數(shù)：32 Pages

TI

德州儀器

絲?。?strong>CDCE706；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER

1FEATURES · High-Performance 3:6 PLL-Based Clock Synthesizer/Multiplier/Divider · User-Programmable PLL Frequencies · EEPROM Programming Without the Need to Apply High Programming Voltage · Easy In-Circuit Programming via SMBus Data Interface · Wide PLL Divider Ratio Allows 0-ppm Output C

文件：1.22229 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

絲?。?strong>CDCE706；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER

1FEATURES · High-Performance 3:6 PLL-Based Clock Synthesizer/Multiplier/Divider · User-Programmable PLL Frequencies · EEPROM Programming Without the Need to Apply High Programming Voltage · Easy In-Circuit Programming via SMBus Data Interface · Wide PLL Divider Ratio Allows 0-ppm Output C

文件：1.22229 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

絲?。?strong>CDCE706；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER

1FEATURES · High-Performance 3:6 PLL-Based Clock Synthesizer/Multiplier/Divider · User-Programmable PLL Frequencies · EEPROM Programming Without the Need to Apply High Programming Voltage · Easy In-Circuit Programming via SMBus Data Interface · Wide PLL Divider Ratio Allows 0-ppm Output C

文件：1.22229 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

絲印：CDCE706；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER

1FEATURES · High-Performance 3:6 PLL-Based Clock Synthesizer/Multiplier/Divider · User-Programmable PLL Frequencies · EEPROM Programming Without the Need to Apply High Programming Voltage · Easy In-Circuit Programming via SMBus Data Interface · Wide PLL Divider Ratio Allows 0-ppm Output C

文件：1.22229 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

絲?。?strong>CDCE706；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER

1FEATURES · High-Performance 3:6 PLL-Based Clock Synthesizer/Multiplier/Divider · User-Programmable PLL Frequencies · EEPROM Programming Without the Need to Apply High Programming Voltage · Easy In-Circuit Programming via SMBus Data Interface · Wide PLL Divider Ratio Allows 0-ppm Output C

文件：1.22229 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

絲?。?strong>CDCE706；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER

1FEATURES · High-Performance 3:6 PLL-Based Clock Synthesizer/Multiplier/Divider · User-Programmable PLL Frequencies · EEPROM Programming Without the Need to Apply High Programming Voltage · Easy In-Circuit Programming via SMBus Data Interface · Wide PLL Divider Ratio Allows 0-ppm Output C

文件：1.22229 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

300MHz、LVCMOS、可編程 3-PLL 時(shí)鐘合成器/倍頻器/分頻器

The CDCE706 is one of the smallest and powerful PLL synthesizer / multiplier / divider available today. Despite its small physical outlines, the CDCE706 is very flexible. It has the capability to produce an almost independent output frequency from a given input frequency.The input frequency can be d ? High Performance 3:6 PLL Based Clock Synthesizer / Multiplier / Divider\n? User Programmable PLL Frequencies\n? EEPROM Programming Without the Need to Apply High Programming Voltage\n? Easy In-Circuit Programming via SMBus Data Interface\n? Wide PLL Divider Ratio Allows 0-ppm Output Clock Error\n?;

TI

德州儀器