絲?。?a target="_blank" title="Marking" href="/cdc906/marking.html">CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER

1FEATURES 2? High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider ? User Programmable PLL Frequencies ? Easy In-Circuit Programming via SMBus Data Interface ? Wide PLL Divider Ratio Allows 0-PPM Output Clock Error ? Generates Precise Video (27 MHz or 54 MHz) and Audio Sy

文件：1.22849 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER

文件：1.08429 Mbytes 頁數(shù)：39 Pages

TI

德州儀器

PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER

1FEATURES 2? High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider ? User Programmable PLL Frequencies ? Easy In-Circuit Programming via SMBus Data Interface ? Wide PLL Divider Ratio Allows 0-PPM Output Clock Error ? Generates Precise Video (27 MHz or 54 MHz) and Audio Sy

文件：1.22849 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER

1FEATURES 2? High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider ? User Programmable PLL Frequencies ? Easy In-Circuit Programming via SMBus Data Interface ? Wide PLL Divider Ratio Allows 0-PPM Output Clock Error ? Generates Precise Video (27 MHz or 54 MHz) and Audio Sy

文件：1.22849 Mbytes 頁數(shù)：46 Pages

TI

德州儀器