1-LINE TO 6-LINE CLOCK DRIVER ‘WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS

Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Drive Outputs (?48-mA

文件：193.52 Kbytes 頁數(shù)：9 Pages

TI

德州儀器

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS

文件：107.62 Kbytes 頁數(shù)：7 Pages

TI

德州儀器

1Line to 6Line Clock Driver

文件：116.61 Kbytes 頁數(shù)：7 Pages

TI

德州儀器

具有可選極性和三態(tài)輸出的 1:6 TTL 時鐘驅(qū)動器

The CDC391 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution. Through the use of the polarity-control (T\\/C) inputs, various combinations of true and complementary outputs can be obtained. The output-enable () input is provided ? Low Output Skew for Clock-Distribution and Clock-Generation Applications \n? TTL-Compatible Inputs and Outputs \n? Distributes One Clock Input to Six Clock Outputs \n? Polarity Control Selects True or Complementary Outputs \n? Distributed VCC and GND Pins Reduce Switching Noise \n? High-Drive Outp;

TI

德州儀器

1Line to 6Line Clock Driver

文件：116.61 Kbytes 頁數(shù)：7 Pages

TI

德州儀器

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS

文件：107.62 Kbytes 頁數(shù)：7 Pages

TI

德州儀器

1Line to 6Line Clock Driver

文件：116.61 Kbytes 頁數(shù)：7 Pages

TI

德州儀器

1Line to 6Line Clock Driver

文件：116.61 Kbytes 頁數(shù)：7 Pages

TI

德州儀器

1Line to 6Line Clock Driver

文件：116.61 Kbytes 頁數(shù)：7 Pages

TI

德州儀器

Package：16-SOIC（0.154"，3.90mm 寬）；包裝：卷帶（TR） 類別：集成電路（IC） 時鐘緩沖器，驅(qū)動器 描述：IC CLK BUFFER 1:6 100MHZ 16SOIC

TI

德州儀器