1Line to 10Line Clock Driver

文件：500.93 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

1Line to 10Line Clock Driver

文件：500.93 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

1Line to 10Line Clock Driver

文件：500.93 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

文件：182.89 Kbytes 頁數(shù)：12 Pages

TI

德州儀器

1Line to 10Line Clock Driver

文件：500.93 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

1Line to 10Line Clock Driver

文件：500.93 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

1Line to 10Line Clock Driver

文件：500.93 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

文件：198.19 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

文件：198.19 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

具有 I2C 控制接口的 1 線路至 18 線路時鐘驅(qū)動器

The CDC318A is a high-performance clock buffer designed to distribute high-speed clocks in PC applications. This device distributes one input (A) to 18 outputs (Y) with minimum skew for clock distribution. The CDC318A operates from a 3.3-V power supply. It is characterized for operation from 0°C to ? High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications\n? Output Skew, tsk(o), Less Than 250 ps\n? Pulse Skew, tsk(p), Less Than 500 ps\n? Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs)\n? I2C Serial Interface Provides Individua;

TI

德州儀器