絲?。?a target="_blank" title="Marking" href="/cd74hct4511e/marking.html">CD74HCT4511E；Package：PDIP(N)；CDx4HC4511, CD74HCT4511 BCD-to-7 Segment Latch/Decoder/Drivers

1 Features ? 2-V to 6-V VCC operation ('HC4511) ? 4.5-V to 5.5-V VCC operation (CD74HCT4511) ? High-output sourcing capability – 7.5 mA at 4.5 V (CD74HCT4511) – 10 mA at 6 V ('HC4511) ? Input latches for BCD code storage ? Lamp test and blanking capability ? Balanced propagation delays and

文件：1.77188 Mbytes 頁數(shù)：29 Pages

TI

德州儀器

BCD to 7-segment latch/decoder/driver

GENERAL DESCRIPTION The 74HC/HCT4511 are high-speed Si-gate CMOS devices and are pin compatible with “4511” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES ? Latch storage of BCD inputs ? Blanking input ? Lamp test input ? Driving common cathode L

文件：80.13 Kbytes 頁數(shù)：12 Pages

PHI

PHI

BCD to 7-segment latch/decoder/driver

1. General description The 74HC4511; 74HCT4511 is a BCD to 7-segment latch/decoder/driver with four address inputs (A, B, C, D), a latch enable input (LE), a ripple blanking input (BI), a lamp test input (LT), and seven segment outputs (a to g). When LE is LOW, the state of the segment outputs

文件：798.03 Kbytes 頁數(shù)：18 Pages

NEXPERIA

安世

BCD to 7-segment latch/decoder/driver

GENERAL DESCRIPTION The 74HC/HCT4511 are high-speed Si-gate CMOS devices and are pin compatible with “4511” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES ? Latch storage of BCD inputs ? Blanking input ? Lamp test input ? Driving common cathode L

文件：80.13 Kbytes 頁數(shù)：12 Pages

PHI

PHI