Phase-Locked Loop with VCO and Lock Detector

文件：446.06 Kbytes 頁數(shù)：28 Pages

TI

德州儀器

Phase-Locked Loop with VCO and Lock Detector

文件：586.4 Kbytes 頁數(shù)：29 Pages

TI

德州儀器

Phase-Locked Loop with VCO and Lock Detector

文件：302.97 Kbytes 頁數(shù)：26 Pages

TI

德州儀器

Phase-Locked Loop with VCO and Lock Detector

文件：446.06 Kbytes 頁數(shù)：28 Pages

TI

德州儀器

Phase-Locked Loop with VCO and Lock Detector

文件：586.4 Kbytes 頁數(shù)：29 Pages

TI

德州儀器

Phase-Locked Loop with VCO and Lock Detector

文件：302.97 Kbytes 頁數(shù)：26 Pages

TI

德州儀器

Phase-Locked Loop with VCO and Lock Detector

文件：446.06 Kbytes 頁數(shù)：28 Pages

TI

德州儀器

Phase-Locked Loop with VCO and Lock Detector

文件：446.06 Kbytes 頁數(shù)：28 Pages

TI

德州儀器

帶 VCO 和鎖定檢測器的高速 CMOS 邏輯鎖相環(huán)

The CD74HC7046A and CD74HCT7046A high-speed silicon-gate CMOS devices, specified in compliance with JEDEC Standard No. 7A, are phase-locked-loop (PLL) circuits that contain a linear voltage-controlled oscillator (VCO), two-phase comparators (PC1, PC2), and a lock detector. A signal input and a compa ? Center Frequency of 18MHz (Typ) at VCC = 5V, Minimum Center Frequency of 12MHz at VCC = 4.5V\n? Edge-Triggered JK Flip-Flop\n? VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption\n? Zero Voltage Offset Due to Op-Amp Buffer\n? Digital Section...2V to 6V\n? Bus Driver Outputs;

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德州儀器

Package：16-SOIC（0.154"，3.90mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC PLL W/VCO/LOCK DETECT 16-SOIC

TI

德州儀器