絲印：HC4015M；Package：SOIC；High Speed CMOS Logic Dual 4-Stage Static Shift Register

Features ? Maximum Frequency, Typically 60MHz CL = 15pF, VCC = 5V, TA = 25oC ? Positive-Edge Clocking ? Overriding Reset ? Buffered Inputs and Outputs ? Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . .

文件：312.29 Kbytes 頁(yè)數(shù)：12 Pages

TI

德州儀器

Dual 4-Bit Shift Register High-Performance Silicon-Gate CMOS

The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two identical independent 4-stage serial input/parallel-output registers. Each register has independent Clock and Reset inputs as well as a singl

文件：139.32 Kbytes 頁(yè)數(shù)：6 Pages

INTEGRAL

Integral Corp.

Dual 4-Bit Shift Register High-Performance Silicon-Gate CMOS

The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two identical independent 4-stage serialinput/parallel-output registers. Each register has independent Clock and Reset inputs as well as a single

文件：192.49 Kbytes 頁(yè)數(shù)：7 Pages

IKSEMICON

Dual 4-Bit Shift Register High-Performance Silicon-Gate CMOS

The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two identical independent 4-stage serialinput/parallel-output registers. Each register has independent Clock and Reset inputs as well as a single

文件：192.49 Kbytes 頁(yè)數(shù)：7 Pages

IKSEMICON