絲?。?a target="_blank" title="Marking" href="/cd74hc354e/marking.html">CD74HC354E；Package：PDIP；8-Line to 1-Line Data Selector/Multiplexer/Register With 3-State Outputs

Features ? HC/HCT354 - Transparent Data and Select Latches ? Buffered Inputs ? Three-State Complementary Outputs ? Bus Line Driving Capability ? Typical Propagation Delay: VCC = 5V, CL = 15pF, TA = 25oC - Data to Output = 18ns ? Fanout (Over Temperature Range) - Standard Outputs . . . .

文件：317 Kbytes 頁數(shù)：17 Pages

TI

德州儀器

8-to-1-line Data Selectors/Multiplexer Register(with 3-state outputs)

Description This data selectors/multiplexers contains full on-chip binary decoding to select one of eight data sources. The data select address is stored in transparent latches that are enabled by a low level address on pin 11, Select Control. Data on the 8 input lines is stored in a parallel inp

文件：64.89 Kbytes 頁數(shù)：10 Pages

HITACHIHitachi Semiconductor

日立日立公司

8-to-1-line Data Selector/Multiplexer/Register (with 3-state outputs)

Description This data selectors/multiplexers contains full on-chip binary decoding to select one of eight data sources. The data select address is stored in transparent latches that are enabled by a low level address on pin 11, Select Control. Data on the 8 input lines is stored in a paralle

文件：122.8 Kbytes 頁數(shù)：10 Pages

RENESAS

瑞薩

8-to-1-line Data Selector/Multiplexer/Register (with 3-state outputs)

Description This data selectors/multiplexers contains full on-chip binary decoding to select one of eight data sources. The data select address is stored in transparent latches that are enabled by a low level address on pin 11, Select Control. Data on the 8 input lines is stored in a paralle

文件：122.8 Kbytes 頁數(shù)：10 Pages

RENESAS

瑞薩