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                >CD74HC109>規(guī)格書列表
                
    
            
    
                
    
                    
    型號(hào)下載 訂購功能描述制造商 上傳企業(yè)LOGO
    
                    
    CD74HC109
    Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
    
Features
? Asynchronous Set and Reset
? Schmitt Trigger Clock Inputs
? Typical fMAX = 54MHz at VCC = 5V, CL = 15pF,
TA = 25oC
? Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
? Wi
    文件：367.45 Kbytes 頁數(shù)：16 Pages
    TI
    德州儀器
    

    CD74HC109
    Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
    文件：279.59 Kbytes 頁數(shù)：12 Pages
    TI
    德州儀器
    

    CD74HC109
    Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
    文件：58.14 Kbytes 頁數(shù)：8 Pages
    TI
    德州儀器
    

    CD74HC109
    Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
    文件：347.95 Kbytes 頁數(shù)：16 Pages
    TI
    德州儀器
    

    CD74HC109
    Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
    文件：454.62 Kbytes 頁數(shù)：15 Pages
    TI
    德州儀器
    

    CD74HC109
    具有設(shè)置和復(fù)位端的高速 CMOS 邏輯雙路正邊沿觸發(fā)式 J-K 觸發(fā)器
    The ?HC109 and ?HCT109 are dual J-K\\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).\n\n The flip-flop is set and reset by active-low S\\ and R\\, respectively. A low on both the set and reset inputs simultaneously will force both Q an  ? Asynchronous Set and Reset\n? Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, A = 25°C\n? Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads\n? Wide Operating Temperature Range . . . -55°C to 125°C\n? Significant Power Reduction Compared to LSTTL Logic ICs\n? 2V to 6V Operation\n? HCT Type;
    TI
    德州儀器
    

    CD74HC109E
    絲?。?a target="_blank" title="Marking" href="/cd74hc109e/marking.html">CD74HC109E；Package：PDIP；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
    
Features
? Asynchronous Set and Reset
? Schmitt Trigger Clock Inputs
? Typical fMAX = 54MHz at VCC = 5V, CL = 15pF,
TA = 25oC
? Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
? Wi
    文件：367.45 Kbytes 頁數(shù)：16 Pages
    TI
    德州儀器
    

    CD74HC109E.A
    絲?。?a target="_blank" title="Marking" href="/cd74hc109e/marking.html">CD74HC109E；Package：PDIP；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
    
Features
? Asynchronous Set and Reset
? Schmitt Trigger Clock Inputs
? Typical fMAX = 54MHz at VCC = 5V, CL = 15pF,
TA = 25oC
? Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
? Wi
    文件：367.45 Kbytes 頁數(shù)：16 Pages
    TI
    德州儀器
    

    CD74HC109M
    絲?。?a target="_blank" title="Marking" href="/hc109m/marking.html">HC109M；Package：SOIC；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
    
Features
? Asynchronous Set and Reset
? Schmitt Trigger Clock Inputs
? Typical fMAX = 54MHz at VCC = 5V, CL = 15pF,
TA = 25oC
? Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
? Wi
    文件：367.45 Kbytes 頁數(shù)：16 Pages
    TI
    德州儀器
    

    CD74HC109M96
    絲印：HC109M；Package：SOIC；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
    
Features
? Asynchronous Set and Reset
? Schmitt Trigger Clock Inputs
? Typical fMAX = 54MHz at VCC = 5V, CL = 15pF,
TA = 25oC
? Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
? Wi
    文件：367.45 Kbytes 頁數(shù)：16 Pages
    TI
    德州儀器
    

    
            
    
		
        
    
            
    
                
    技術(shù)參數(shù)
    
            
    
            
      
            	
    • Technology Family：
      HC
    • Supply voltage (Min) (V)：
      2
    • Supply voltage (Max) (V)：
      6
    • Input type：
      LVTTL/CMOS
    • Output type：
      Push-Pull
    • Clock Frequency (MHz)：
      24
    • ICC (Max) (uA)：
      40
    • IOL (Max) (mA)：
      6
    • IOH (Max) (mA)：
      -6
    • Features：
      Balanced outputs
    
            
    
        
    
            
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    更多CD74HC109供應(yīng)商
            更新時(shí)間2026-1-22 18:30:00
        
    
        
    
          
    
            
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