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首頁(yè) >CD74HC107>規(guī)格書列表

型號(hào)	下載訂購(gòu)	功能描述	制造商上傳企業(yè)	LOGO
CD74HC107	文件：609.54 Kbytes Page：20 Pages	Dual J-K Flip-Flop with Reset Negative-Edge Trigger Features ? Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times ? Asynchronous Reset ? Complementary Outputs ? Buffered Inputs ? Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC ? Fanout (Over Temperature Range) - Standard Outputs . . . . . 文件：609.54 Kbytes 頁(yè)數(shù)：20 Pages	TI 德州儀器	TI
CD74HC107	文件：56.86 Kbytes Page：8 Pages	Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：56.86 Kbytes 頁(yè)數(shù)：8 Pages	TI 德州儀器	TI
CD74HC107	文件：451.69 Kbytes Page：15 Pages	Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：451.69 Kbytes 頁(yè)數(shù)：15 Pages	TI 德州儀器	TI
CD74HC107	文件：624.14 Kbytes Page：16 Pages	Dual J-K Flip-Flop with Reset Negative-Edge Trigger 文件：624.14 Kbytes 頁(yè)數(shù)：16 Pages	TI 德州儀器	TI
CD74HC107	文件：300 bytes Page：1 Pages	具有復(fù)位功能的高速 CMOS 邏輯雙路負(fù)邊沿觸發(fā)式 J-K 觸發(fā)器 The ?HC107 and ?HCT107 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.\n\n These flip-flops have independent J, K, Reset and Clo ? Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times\n? Complementary Outputs\n? Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C\n? Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads\n? Wide Operating Temperature Range . . . -55°C to 125°;	TI 德州儀器	TI
CD74HC107E	文件：609.54 Kbytes Page：20 Pages	絲印：CD74HC107E；Package：PDIP；Dual J-K Flip-Flop with Reset Negative-Edge Trigger Features ? Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times ? Asynchronous Reset ? Complementary Outputs ? Buffered Inputs ? Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC ? Fanout (Over Temperature Range) - Standard Outputs . . . . . 文件：609.54 Kbytes 頁(yè)數(shù)：20 Pages	TI 德州儀器	TI
CD74HC107E.A	文件：609.54 Kbytes Page：20 Pages	絲?。?a target="_blank" title="Marking" href="/cd74hc107e/marking.html">CD74HC107E；Package：PDIP；Dual J-K Flip-Flop with Reset Negative-Edge Trigger Features ? Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times ? Asynchronous Reset ? Complementary Outputs ? Buffered Inputs ? Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC ? Fanout (Over Temperature Range) - Standard Outputs . . . . . 文件：609.54 Kbytes 頁(yè)數(shù)：20 Pages	TI 德州儀器	TI
CD74HC107EE4	文件：609.54 Kbytes Page：20 Pages	絲?。?a target="_blank" title="Marking" href="/cd74hc107e/marking.html">CD74HC107E；Package：PDIP；Dual J-K Flip-Flop with Reset Negative-Edge Trigger Features ? Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times ? Asynchronous Reset ? Complementary Outputs ? Buffered Inputs ? Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC ? Fanout (Over Temperature Range) - Standard Outputs . . . . . 文件：609.54 Kbytes 頁(yè)數(shù)：20 Pages	TI 德州儀器	TI
CD74HC107M	文件：609.54 Kbytes Page：20 Pages	絲?。?a target="_blank" title="Marking" href="/hc107m/marking.html">HC107M；Package：SOIC；Dual J-K Flip-Flop with Reset Negative-Edge Trigger Features ? Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times ? Asynchronous Reset ? Complementary Outputs ? Buffered Inputs ? Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC ? Fanout (Over Temperature Range) - Standard Outputs . . . . . 文件：609.54 Kbytes 頁(yè)數(shù)：20 Pages	TI 德州儀器	TI
CD74HC107M96	文件：609.54 Kbytes Page：20 Pages	絲印：HC107M；Package：SOIC；Dual J-K Flip-Flop with Reset Negative-Edge Trigger Features ? Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times ? Asynchronous Reset ? Complementary Outputs ? Buffered Inputs ? Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC ? Fanout (Over Temperature Range) - Standard Outputs . . . . . 文件：609.54 Kbytes 頁(yè)數(shù)：20 Pages	TI 德州儀器	TI

技術(shù)參數(shù)

Technology Family：
HC
Supply voltage (Min) (V)：
2
Supply voltage (Max) (V)：
6
Input type：
LVTTL/CMOS
Output type：
Push-Pull
Clock Frequency (MHz)：
24
ICC (Max) (uA)：
40
IOL (Max) (mA)：
6
IOH (Max) (mA)：
-6
Features：
Balanced outputs

供應(yīng)商	型號(hào)	品牌	批號(hào)	封裝	庫(kù)存	備注	價(jià)格
深圳市恒科翔業(yè)電子有限公司	CD74HC107	TI德州儀器	22+		24000	原裝正品現(xiàn)貨,實(shí)單可談,量大價(jià)優(yōu)	詢價(jià)
深圳市一線半導(dǎo)體有限公司	CD74HC107M	TI	24+		4200		詢價(jià)
深圳市鼎盛源芯科技有限公司	CD74HC107MT	TI	16+	原廠封裝	10000	全新原裝正品,代理優(yōu)勢(shì)渠道供應(yīng),歡迎來(lái)電咨詢	詢價(jià)
深圳市龍騰翼電子科技有限公司	CD74HC107E	TI	2013	DIP	10	全新	詢價(jià)
瀚佳科技(深圳)有限公司	CD74HC107MT	Texas Instruments	24+	14-SOIC(0.154	56300		詢價(jià)
艾睿（深圳）半導(dǎo)體有限公司	CD74HC107MG4	TI/德州儀器	2447	SOP14-3.9	100500	一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨	詢價(jià)
深圳市科雨電子有限公司	CD74HC107M96G4	TI	25+	IC	2500	就找我吧!--邀您體驗(yàn)愉快問購(gòu)元件!	詢價(jià)
訊運(yùn)(深圳/上海)電子有限公司	CD74HC107M96	TI(德州儀器)	2021+	SOIC-14	499		詢價(jià)
深圳市易訊博科技有限公司	CD74HC107MT		22+	NA	3450	加我QQ或微信咨詢更多詳細(xì)信息,	詢價(jià)
深圳市威爾健半導(dǎo)體有限公司	CD74HC107M其他被動(dòng)元件	TI/德州儀器	23+	SOP14	50000	全新原裝正品現(xiàn)貨,支持訂貨	詢價(jià)

更多CD74HC107供應(yīng)商更新時(shí)間2026-1-21 15:01:00

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