TRIPLE 3-INPUT POSITIVE-NAND GATES

AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Pro

文件：473.88 Kbytes 頁數(shù)：14 Pages

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德州儀器

TRIPLE 3-INPUT POSITIVE-NAND GATES

文件：817.75 Kbytes 頁數(shù)：13 Pages

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德州儀器

Triple 3-Input NAND Gate

文件：29.45 Kbytes 頁數(shù)：5 Pages

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德州儀器

3 通道、3 輸入、1.5V 至 5.5V 與非門

The CD74AC10 contains three independent 3-input NAND gates. This device performs the Boolean function Y = (A ?B ? C)\\ or Y = A\\ + B\\ + C\\ in positive logic. ? AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage\n? Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption\n? Balanced Propagation Delays\n? ±24-mA Output Drive Current \n? Fanout to 15 F Devices\n \n? SCR Latchup-Resistant;

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德州儀器

CDx4AC109 Dual J-K Positive-Edge-Triggered Flip-flops with Clear and Preset

1 Features ? AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage ? Speed of bipolar F, AS, and S, with significantly reduced power consumption ? Balanced propagation delays ? ±24mA output drive current – Fanout to 15 F devices ? SCR-latchup

文件：1.09024 Mbytes 頁數(shù)：22 Pages

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德州儀器

絲印：CD74AC109E；Package：PDIP；CDx4AC109 Dual J-K Positive-Edge-Triggered Flip-flops with Clear and Preset

1 Features ? AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage ? Speed of bipolar F, AS, and S, with significantly reduced power consumption ? Balanced propagation delays ? ±24mA output drive current – Fanout to 15 F devices ? SCR-latchup

文件：1.09024 Mbytes 頁數(shù)：22 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd74ac109e/marking.html">CD74AC109E；Package：PDIP；CDx4AC109 Dual J-K Positive-Edge-Triggered Flip-flops with Clear and Preset

1 Features ? AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage ? Speed of bipolar F, AS, and S, with significantly reduced power consumption ? Balanced propagation delays ? ±24mA output drive current – Fanout to 15 F devices ? SCR-latchup

文件：1.09024 Mbytes 頁數(shù)：22 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/ac109m/marking.html">AC109M；Package：SOIC；CDx4AC109 Dual J-K Positive-Edge-Triggered Flip-flops with Clear and Preset

1 Features ? AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage ? Speed of bipolar F, AS, and S, with significantly reduced power consumption ? Balanced propagation delays ? ±24mA output drive current – Fanout to 15 F devices ? SCR-latchup

文件：1.09024 Mbytes 頁數(shù)：22 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/ac109m/marking.html">AC109M；Package：SOIC；CDx4AC109 Dual J-K Positive-Edge-Triggered Flip-flops with Clear and Preset

1 Features ? AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage ? Speed of bipolar F, AS, and S, with significantly reduced power consumption ? Balanced propagation delays ? ±24mA output drive current – Fanout to 15 F devices ? SCR-latchup

文件：1.09024 Mbytes 頁數(shù)：22 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd74ac10e/marking.html">CD74AC10E；Package：PDIP；TRIPLE 3-INPUT POSITIVE-NAND GATES

AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Pro

文件：473.88 Kbytes 頁數(shù)：14 Pages

TI

德州儀器