High-Speed CMOS Logic Triple 3-Input AND Gate

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TI

德州儀器

High Speed CMOS Logic Triple 3-Input AND Gate

文件：33.84 Kbytes 頁數(shù)：6 Pages

TI

德州儀器

High-Speed CMOS Logic Triple 3-Input AND Gate

文件：260.86 Kbytes 頁數(shù)：11 Pages

TI

德州儀器

High-Speed CMOS Logic Triple 3-Input AND Gate

文件：440.26 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

High Speed CMOS Logic Triple 3-Input AND Gate

文件：33.84 Kbytes 頁數(shù)：6 Pages

TI

德州儀器

High-Speed CMOS Logic Triple 3-Input AND Gate

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TI

德州儀器

具有設(shè)置與復(fù)位端的高速 CMOS 邏輯雙路負(fù)邊沿觸發(fā)式 J-K 觸發(fā)器

The ?HC112 and ?HCT112 utilize silicon-gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.\n\n These flip-flops have independent J, K, Set, Reset, a ? Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times\n? Complementary Outputs\n? Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C\n? Standard Outputs . . . . . 10 LSTTL Loads\n? Wide Operating Temperature Range . . . –55°C to 125°C\n? Significant Pow;

TI

德州儀器