High-Speed CMOS Logic Triple 3-Input NAND Gate

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TI

德州儀器

High-Speed CMOS Logic Triple 3-Input NAND Gate

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TI

德州儀器

High-Speed CMOS Logic Triple 3-Input NAND Gate

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TI

德州儀器

具有設(shè)置和復(fù)位端的高速 CMOS 邏輯雙路正邊沿觸發(fā)式 J-K 觸發(fā)器

The ?HC109 and ?HCT109 are dual J-K\\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).\n\n The flip-flop is set and reset by active-low S\\ and R\\, respectively. A low on both the set and reset inputs simultaneously will force both Q an ? Asynchronous Set and Reset\n? Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, A = 25°C\n? Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads\n? Wide Operating Temperature Range . . . -55°C to 125°C\n? Significant Power Reduction Compared to LSTTL Logic ICs\n? 2V to 6V Operation\n? HCT Type;

TI

德州儀器