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                >CD54HC4017F3A>規(guī)格書列表
                
    
            
    
                
    
                    
    型號(hào)下載 訂購(gòu)功能描述制造商 上傳企業(yè)LOGO
    
                    
    CD54HC4017F3A
    絲?。?a target="_blank" title="Marking" href="/8601101ea/marking.html">8601101EA；Package：CDIP；DECADE COUNTER/DIVIDER WITH TEN DECODED OUTPUTS
    
2-V to 6-V Operation
Fully Static Operation
Buffered Inputs
Common Reset
Positive-Edge Clocking
Balanced Propagation Delay and Transition
Times
High Noise Immunity: NIL = 30%, NIH = 30%
of VCC at VCC = 5 V
Packaged in Ceramic (F) DIP Package and
Also Available in Chip Form (H)


    文件：275.83 Kbytes 頁(yè)數(shù)：12 Pages
    TI
    德州儀器
    

    CD54HC4017F3A
    絲?。?a target="_blank" title="Marking" href="/8601101ea/marking.html">8601101EA；Package：CDIP；High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
    
Features
? Fully Static Operation
? Buffered Inputs
? Common Reset
? Positive Edge Clocking
? Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC
? Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . 
    文件：738.58 Kbytes 頁(yè)數(shù)：22 Pages
    TI
    德州儀器
    

    CD54HC4017F3A
    High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
    文件：347.51 Kbytes 頁(yè)數(shù)：14 Pages
    TI
    德州儀器
    

    CD54HC4017F3A
    High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
    文件：497.87 Kbytes 頁(yè)數(shù)：16 Pages
    TI
    德州儀器
    

    CD54HC4017F3A
    High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
    文件：528.36 Kbytes 頁(yè)數(shù)：16 Pages
    TI
    德州儀器
    

    CD54HC4017F3A
    DECADE COUNTER/DIVIDER WITH TEN DECODED OUTPUTS
    文件：215.42 Kbytes 頁(yè)數(shù)：12 Pages
    TI
    德州儀器
    

    CD54HC4017F3A.A
    絲印：8601101EA；Package：CDIP；High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
    
Features
? Fully Static Operation
? Buffered Inputs
? Common Reset
? Positive Edge Clocking
? Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC
? Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . 
    文件：738.58 Kbytes 頁(yè)數(shù)：22 Pages
    TI
    德州儀器
    

    CD54HC4017F3A.A
    絲?。?a target="_blank" title="Marking" href="/8601101ea/marking.html">8601101EA；Package：CDIP；DECADE COUNTER/DIVIDER WITH TEN DECODED OUTPUTS
    
2-V to 6-V Operation
Fully Static Operation
Buffered Inputs
Common Reset
Positive-Edge Clocking
Balanced Propagation Delay and Transition
Times
High Noise Immunity: NIL = 30%, NIH = 30%
of VCC at VCC = 5 V
Packaged in Ceramic (F) DIP Package and
Also Available in Chip Form (H)


    文件：275.83 Kbytes 頁(yè)數(shù)：12 Pages
    TI
    德州儀器
    

    
            
    
		
        
    
            
    
                
    詳細(xì)參數(shù)
    
            
    
            
      
            	
    • 型號(hào)：
      CD54HC4017F3A
    • 制造商：
      Texas Instruments 
    • 功能描述：
      Counter/Divider Single 5-Bit Decade UP 16-Pin CDIP Tube 
    • 功能描述：
      8601101EA, JOHNSON DECADE COUNTER - Rail/Tube 
    
            
    
        
    
            
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