Dual J-K Flip-Flop with Set and Reset

Description The CD54AC109/3A and CD54ACT109/3A are dual “J-K” flip-flops with set and reset that utilize the Harris Advanced CMOS Logic technology. These flip-flops have independent J, K, Set, Reset and Clock inputs and Q and Q outputs. The CD54AC109/3A and CD54ACT109/3A changes state on the posi

文件：10.39 Kbytes 頁數(shù)：1 Pages

INTERSIL

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：412.14 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd54act109f3a/marking.html">CD54ACT109F3A；Package：CDIP；DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：412.14 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd54act109f3a/marking.html">CD54ACT109F3A；Package：CDIP；DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：412.14 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

High-Speed CMOS Logic Octal D-Type Flip-Flop, 3-State Positive-Edge Triggered

文件：293.65 Kbytes 頁數(shù)：15 Pages

TI

德州儀器

High-Speed CMOS Logic Analog Multiplexers/Demultiplexers

文件：465.55 Kbytes 頁數(shù)：26 Pages

TI

德州儀器

High-Speed CMOS Logic Analog Multiplexers/Demultiplexers

文件：784.97 Kbytes 頁數(shù)：30 Pages

TI

德州儀器

High-Speed CMOS Logic Analog Multiplexers/Demultiplexers

文件：784.97 Kbytes 頁數(shù)：30 Pages

TI

德州儀器

High-Speed CMOS Logic Analog Multiplexers/Demultiplexers

文件：465.55 Kbytes 頁數(shù)：26 Pages

TI

德州儀器

High-Speed CMOS Logic Analog Multiplexers/Demultiplexers

文件：784.97 Kbytes 頁數(shù)：30 Pages

TI

德州儀器