CMOS Dual Up-Counters

Features: Medium-speed operation — 6-MHz typical clock frequency st 10 V, = Positive- or negative-edge triggering m Synchronous internal carry propagation . 100% tested for quiescent current at 20 V & Maximum input current of 1 uA at 18 V ‘over full package-temperature range; 100 nAat

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德州儀器

Cmos Dual Up-Counters

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德州儀器

CMOS 雙路二進(jìn)制加法計(jì)數(shù)器

CD4518 Dual BCD Up-Counter and CD4520 Dual Binary Up-Counter each consist of two identical, internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or negative-going transition. For ? Medium-speed operation - ???6-MHz typical clock frequency at 10 V\n? Synchronous internal carry propagation\n? Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C\n? 1 V at VDD = 5 V\n? 2.5 V at VDD = 15 V\n? 5-V, 10-V, and 15-V parametric ratings\n? ;

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德州儀器

CMOS Dual Up Counters

Description CD4518BMS Dual BCD Up Counter and CD4520BMS Dual Binary Up Counter each consist of two identical, internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or negative-g

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INTERSIL

CMOS DUAL UP-COUNTERS

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德州儀器

CMOS Dual Up-Counters

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德州儀器