CMOS 4-Bit Latch/4-to-16 Line Decoders

Features: ? Strobed input latch ? Inhibit contral u 100% tested for quiescent current at 20 V ? Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C u Noise margin (over full package temper- ature range): 1VatVpp= 5V 2VatVpp=10V 25VatVpp

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TI

德州儀器

Cmos 4-Bit Latch/4-to-16 Line Decoders

文件：1.026599 Mbytes 頁數(shù)：15 Pages

TI

德州儀器

CMOS 4 位鎖存器/4 至 16 線解碼器

CD4514B and CD4515B consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last inputdata presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0 (CD4514B)or 1 (CD4515B) regardless of the state of the data or strobe inputs CD4514B Output \"High\" on Select CD4515B Output \"Low\" on Select \n? Inhibit control\n? Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C\n? 1 V at VDD = 5 V\n? 2.5 V at VDD = 15 V\n? 5-V, 10-V, and 15-V parametric ratings\n? Meets all requirement;

TI

德州儀器

CMOS 4-Bit Latch/4-to-16 Line Decoders

Description CD4514BMS and CD4515BMS consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0(CD4514BMS) or 1(CD4515BMS) regardless of the state of

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INTERSIL

T0-3PN Plastic-Encapsulate Transistors

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ETCList of Unclassifed Manufacturers

未分類制造商

D TYPE CONNECTOR HOODS DIECAST HOODS

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DUBILIER