CMOS 8-Bit Addressable Latch

文件：973.92 Kbytes 頁數(shù)：16 Pages

TI

德州儀器

CMOS 8-Bit Addressable Latch

文件：969.11 Kbytes 頁數(shù)：17 Pages

TI

德州儀器

CMOS 8-Bit Addressable Latch

文件：969.11 Kbytes 頁數(shù)：17 Pages

TI

德州儀器

CMOS 8-Bit Addressable Latch

文件：969.11 Kbytes 頁數(shù)：17 Pages

TI

德州儀器

CMOS 8-Bit Addressable Latch

文件：973.92 Kbytes 頁數(shù)：16 Pages

TI

德州儀器

CMOS 8-Bit Addressable Latch

文件：969.11 Kbytes 頁數(shù)：17 Pages

TI

德州儀器

CMOS 8-Bit Addressable Latch

文件：969.11 Kbytes 頁數(shù)：17 Pages

TI

德州儀器

CMOS 8-Bit Addressable Latch

文件：969.11 Kbytes 頁數(shù)：17 Pages

TI

德州儀器

CMOS 8 位可尋址鎖存器

CD4099B 8-bit addressable latch is a serial-input, parallel-output storage register that can perform a variety of functions.\n Data are inputted to a particular bit in the latch when that bit is addressed (by means of input A0, A1, A2) and when WRITE DISABLE is at a low level. When WRITE DISABLE is ? Serial data input\n? Storage register capability\n? Can function as demultiplexer\n? 100% tested for quiescent current at 20 V\n? Noise margin (full package-temperature range) = ????????1 V at VDD = 5 V ????????2 V at VDD = 10 V ?????2.5 V at VDD = 15 V\n? Meets all requirements of JEDEC Tent;

TI

德州儀器

8-Bit Addressable Latch

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