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首頁 >CD4086BE.A>規(guī)格書列表

型號	下載訂購	功能描述	制造商上傳企業(yè)	LOGO
CD4086BE.A	文件：815.9 Kbytes Page：17 Pages	絲?。?a target="_blank" title="Marking" href="/cd4086be/marking.html">CD4086BE；Package：PDIP；CMOS Expandable 4-Wide 2-Input AND-OR-INVERT Gate Features: Bm Medium-speed operation — tp = 90 ns; tpLH ? 140 ns {typ.) at TOV INHIBIT and ENABLE inputs : Buffered outputs = 100% tested for quiescent current at 20 V Maximum input leakage current of 18 V over full package-temperature range; 100 nA at 18 V and 25°C Noise margin (o 文件：815.9 Kbytes 頁數(shù)：17 Pages	TI 德州儀器	TI
CD4086BM	文件：539.57 Kbytes Page：12 Pages	CMOS EXPANDABLE 4-WIDE 2-INPUT AND-OR-INVERT GATE 文件：539.57 Kbytes 頁數(shù)：12 Pages	TI 德州儀器	TI
CD4086BM	文件：828.89 Kbytes Page：13 Pages	CMOS Expandable 4-Wide 2-Input AND-OR-INVERT Gate 文件：828.89 Kbytes 頁數(shù)：13 Pages	TI 德州儀器	TI
CD4086BM	文件：815.9 Kbytes Page：17 Pages	CMOS Expandable 4-Wide 2-Input AND-OR-INVERT Gate Features: Bm Medium-speed operation — tp = 90 ns; tpLH ? 140 ns {typ.) at TOV INHIBIT and ENABLE inputs : Buffered outputs = 100% tested for quiescent current at 20 V Maximum input leakage current of 18 V over full package-temperature range; 100 nA at 18 V and 25°C Noise margin (o 文件：815.9 Kbytes 頁數(shù)：17 Pages	TI 德州儀器	TI

更多CD4086BE.A供應商更新時間2026-1-18 10:06:00