CMOS 4-BIT D-TYPE REGISTERS

文件：218.7 Kbytes 頁數(shù)：11 Pages

TI

德州儀器

CMOS 4-BIT D-TYPE REGISTERS

文件：218.7 Kbytes 頁數(shù)：11 Pages

TI

德州儀器

CMOS 4-BIT D-TYPE REGISTERS

文件：218.7 Kbytes 頁數(shù)：11 Pages

TI

德州儀器

CMOS 4-Bit D-type Registers

文件：566.59 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

CMOS 4-BIT D-TYPE REGISTERS

文件：218.7 Kbytes 頁數(shù)：11 Pages

TI

德州儀器

具有時鐘和三態(tài)輸出的 CMOS 4 位 D 類寄存器

CD4076B types are four-bit registers consisting of D-type flip-flops that feature three-state outputs. DataDisable inputs are provided to control the entry of data into the flip-flops. When both Data Disable inputs arelow, data at the D inputs are loaded into their respective flip-flops on the next ? Three-state outputs\n? Gated output control lines for enabling or disabling the outputs\n? 100% tested for quiescent current at 20 V\n? Noise margin over full package temperature range: \n? 2 V at VDD = 10 V\n? 5-V, 10-V, and 15-V parametric ratings\n? Meets all requirements of JEDEC Tentative;

TI

德州儀器

具有時鐘和三態(tài)輸出的 CMOS 4 位 D 類寄存器

CD4076B types are four-bit registers consisting of D-type flip-flops that feature three-state outputs. DataDisable inputs are provided to control the entry of data into the flip-flops. When both Data Disable inputs arelow, data at the D inputs are loaded into their respective flip-flops on the next ? Three-state outputs\n? Gated output control lines for enabling or disabling the outputs\n? 100% tested for quiescent current at 20 V\n? Noise margin over full package temperature range: \n? 2 V at VDD = 10 V\n? 5-V, 10-V, and 15-V parametric ratings\n? Meets all requirements of JEDEC Tentative;

TI

德州儀器

CMOS 4 -Bit D-Type Register

CD4076BMS types are four-bit registers consisting of D-type flip-flops that feature three-state outputs. Data Disable inputs are provided to control the entry of data into the flip-flops. When both Data Disable inputs are low, data at the D inputs are loaded into their respective flip-flops on the n ? High Voltage Type (20V Rating) \n? Three State Outputs \n? Input Disabled Without Gating the Clock \n? Gated Output Control Lines for Enabling or Disabling the Outputs \n? Standardized Symmetrical Output Characteristics \n? 100% Tested for Quiescent Current at 20V \n? Maximum Input Current of ;

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Package：16-SOIC（0.154"，3.90mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 功能：復位 類別：集成電路（IC） 觸發(fā)器 描述：IC FF D-TYPE SNGL 4BIT 16SOIC

TI

德州儀器

Package：16-SOIC（0.154"，3.90mm 寬）；包裝：卷帶（TR） 功能：復位 類別：集成電路（IC） 觸發(fā)器 描述：IC FF D-TYPE SNGL 4BIT 16SOIC

TI

德州儀器