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    首頁 >絲印反查>CD4023B

    型號下載 訂購功能描述制造商 上傳企業(yè)LOGO

    CD4023BNSR

    絲印:CD4023B;Package:SOP;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    CD4023BNSR.A

    絲?。?strong>CD4023B;Package:SOP;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    CD4023BE

    絲印:CD4023BE;Package:PDIP;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    CD4023BE.A

    絲?。?a target="_blank" title="Marking" href="/cd4023be/marking.html">CD4023BE;Package:PDIP;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    CD4023BEE4

    絲?。?a target="_blank" title="Marking" href="/cd4023be/marking.html">CD4023BE;Package:PDIP;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    CD4023BF

    絲?。?a target="_blank" title="Marking" href="/cd4023bf/marking.html">CD4023BF;Package:CDIP;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    CD4023BF.A

    絲?。?a target="_blank" title="Marking" href="/cd4023bf/marking.html">CD4023BF;Package:CDIP;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    CD4023BF3A

    絲?。?a target="_blank" title="Marking" href="/cd4023bf3a/marking.html">CD4023BF3A;Package:CDIP;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    CD4023BF3A.A

    絲印:CD4023BF3A;Package:CDIP;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    CD4023BM

    絲?。?a target="_blank" title="Marking" href="/cd4023bm/marking.html">CD4023BM;Package:SOIC;CMOS NAND GATES

    Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

    文件:1.0201 Mbytes 頁數(shù):23 Pages

    TI

    德州儀器

    詳細參數(shù)

    • 型號:

      CD4023B

    • 功能描述:

      邏輯門 Triple 3-Input

    • RoHS:

    • 制造商:

      Texas Instruments

    • 產品:

      OR

    • 邏輯系列:

      LVC

    • 柵極數(shù)量:

      2

    • 線路數(shù)量(輸入/輸出):

      2/1

    • 高電平輸出電流:

      - 16 mA

    • 低電平輸出電流:

      16 mA

    • 傳播延遲時間:

      3.8 ns

    • 電源電壓-最大:

      5.5 V

    • 電源電壓-最小:

      1.65 V

    • 最大工作溫度:

      + 125 C

    • 安裝風格:

      SMD/SMT

    • 封裝/箱體:

      DCU-8

    • 封裝:

      Reel

    供應商型號品牌批號封裝庫存備注價格
    TI
    23+
    14-SOIC
    15000
    TI現(xiàn)貨商!原裝正品!
    詢價
    TI
    23+
    14-SOP
    65600
    詢價
    TI
    25+
    SOP-14
    9854
    就找我吧!--邀您體驗愉快問購元件!
    詢價
    TI/德州儀器
    24+
    SOP-14
    9600
    原裝現(xiàn)貨,優(yōu)勢供應,支持實單!
    詢價
    TI(德州儀器)
    23+
    NA
    20094
    正納10年以上分銷經(jīng)驗原裝進口正品做服務做口碑有支持
    詢價
    22+
    NA
    3450
    加我QQ或微信咨詢更多詳細信息,
    詢價
    TI/德州儀器
    23+
    SOP14
    50000
    全新原裝正品現(xiàn)貨,支持訂貨
    詢價
    TI
    22+
    14SOIC
    9000
    原廠渠道,現(xiàn)貨配單
    詢價
    TI
    25+
    SOP14
    8880
    原裝認準芯澤盛世!
    詢價
    TI
    25+
    SO (NS)
    6000
    原廠原裝,價格優(yōu)勢
    詢價
    更多CD4023B供應商 更新時間2026-1-22 10:50:00

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