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首頁 >CD40192BF.A>規(guī)格書列表

型號	下載訂購	功能描述	制造商上傳企業(yè)	LOGO
CD40192BF.A	文件：915.5 Kbytes Page：20 Pages	絲印：CD40192BF；Package：CDIP；CMOS Presettable Up/Down Counters (Dual Clock With Reset) Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica 文件：915.5 Kbytes 頁數(shù)：20 Pages	TI 德州儀器	TI
CD40192BM	文件：141.69 Kbytes Page：6 Pages	Synchronous 4-Bit Up/Down Decade Counter 文件：141.69 Kbytes 頁數(shù)：6 Pages	NSC 國半	NSC
CD40192B-MIL	文件：1.11003 Mbytes Page：15 Pages	CMOs Presettable Up/Down counters 文件：1.11003 Mbytes 頁數(shù)：15 Pages	TI 德州儀器	TI
CD40192B-MIL	文件：915.5 Kbytes Page：20 Pages	CMOS Presettable Up/Down Counters (Dual Clock With Reset) Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica 文件：915.5 Kbytes 頁數(shù)：20 Pages	TI 德州儀器	TI

更多CD40192BF.A供應商更新時間2026-1-18 16:30:00