CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

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TI

德州儀器

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes 頁(yè)數(shù)：17 Pages

TI

德州儀器

CMOS 可預(yù)置 N 分頻計(jì)數(shù)器

CD4018B types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. CLOCK, RESET, DATA, PRESET ENABLE, and 5 individual JAM inputs are provided. Divide by 10, 8, 6, 4, or 2 counter configurations can be implemented by feeding the Q\\5, Q\\4, Q\\3 ? Medium speed operation……10 MHz (typ.) at VDD – VSS = 10 V\n? 100% tested for quiescent current at 20 V\n? 5-V, 10-V, and 15-V parametric ratings\n? Noise margin (full package-temperature range) = ????????1 V at VDD = 5 V ????????2 V at VDD = 10 V ?????2.5 V at VDD = 15 V\n? Applications: \n? ;

TI

德州儀器

CMOS Presettable Divide-By- “N” Counter

Description CD4018BMS types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. Features ? High Voltage Type (20V Rating) ? Medium Speed Operation 10MHz (typ.) at VDD - VSS = 10V ? Fully Static Operation ? 100 Tested for Q

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INTERSIL

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes 頁(yè)數(shù)：12 Pages

TI

德州儀器

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes 頁(yè)數(shù)：17 Pages

TI

德州儀器