Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

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FAIRCHILD

仙童半導(dǎo)體

Package：16-DIP（0.300"，7.62mm）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 功能：串行至并行 類別：集成電路（IC） 移位寄存器 描述：IC REGISTER STATIC DL 4BIT 16DIP

ONSEMI

安森美半導(dǎo)體

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow? (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

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INTERSIL

CMOS Dual 4-Stage Static Shift Register

文件：521.58 Kbytes 頁數(shù)：11 Pages

TI

德州儀器

CMOS Dual 4-stage Static Shift Register

文件：884.25 Kbytes 頁數(shù)：15 Pages

TI

德州儀器