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          首頁
                >CD4011B>規(guī)格書列表
                
          
            
          
                
          
                    
          型號下載 訂購功能描述制造商 上傳企業(yè)LOGO
          
                    
          CD4011BF3A
          絲印：CD4011BF3A；Package：CDIP；CMOS NAND GATES
          
Features:
 Propagation delay time = 60 ns (typ.) at
CL =50 pF, Vpp = 10V
= Buffered inputs and outputs
= Standardized symmetrical output characteristics
 Maximum input current of 1 uA at 18 V
over full package temperature range;
100 nA at 18 V and 25°C
= 100% tested for quiescent curre
          文件：1.0201 Mbytes 頁數(shù)：23 Pages
          TI
          德州儀器
          

          CD4011BF3A.A
          絲印：CD4011BF3A；Package：CDIP；CMOS NAND GATES
          
Features:
 Propagation delay time = 60 ns (typ.) at
CL =50 pF, Vpp = 10V
= Buffered inputs and outputs
= Standardized symmetrical output characteristics
 Maximum input current of 1 uA at 18 V
over full package temperature range;
100 nA at 18 V and 25°C
= 100% tested for quiescent curre
          文件：1.0201 Mbytes 頁數(shù)：23 Pages
          TI
          德州儀器
          

          CD4011BG-S14-R
          QUAD 2-INPUT NAND BUFFERED B SERIES GATE
          
■ DESCRIPTION
The UTC CD4011B contains four independent 2-input NAND gates which perform the function Y=A B ? in positive logic.
■ FEATURES
* 5V-10V-15V Parametric Ratings
* Quad 2-Input NAND Gate
* Symmetrical Output Characteristics
* Maximum Input Current of 1uA at 15V Over Full Package Te
          文件：176.66 Kbytes 頁數(shù)：5 Pages
          UTC
          友順
          

          CD4011BKTR
          CMOS Quad 2-Input NAND Gate
          
Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of 
          文件：29.89 Kbytes 頁數(shù)：3 Pages
          INTERSIL
          

          CD4011BL-S14-R
          QUAD 2-INPUT NAND BUFFERED B SERIES GATE
          
■ DESCRIPTION
The UTC CD4011B contains four independent 2-input NAND gates which perform the function Y=A B ? in positive logic.
■ FEATURES
* 5V-10V-15V Parametric Ratings
* Quad 2-Input NAND Gate
* Symmetrical Output Characteristics
* Maximum Input Current of 1uA at 15V Over Full Package Te
          文件：176.66 Kbytes 頁數(shù)：5 Pages
          UTC
          友順
          

          CD4011BM
          絲?。?a target="_blank" title="Marking" href="/cd4011bm/marking.html">CD4011BM；Package：SOIC；CMOS NAND GATES
          
Features:
 Propagation delay time = 60 ns (typ.) at
CL =50 pF, Vpp = 10V
= Buffered inputs and outputs
= Standardized symmetrical output characteristics
 Maximum input current of 1 uA at 18 V
over full package temperature range;
100 nA at 18 V and 25°C
= 100% tested for quiescent curre
          文件：1.0201 Mbytes 頁數(shù)：23 Pages
          TI
          德州儀器
          

          CD4011BM.A
          絲?。?a target="_blank" title="Marking" href="/cd4011bm/marking.html">CD4011BM；Package：SOIC；CMOS NAND GATES
          
Features:
 Propagation delay time = 60 ns (typ.) at
CL =50 pF, Vpp = 10V
= Buffered inputs and outputs
= Standardized symmetrical output characteristics
 Maximum input current of 1 uA at 18 V
over full package temperature range;
100 nA at 18 V and 25°C
= 100% tested for quiescent curre
          文件：1.0201 Mbytes 頁數(shù)：23 Pages
          TI
          德州儀器
          

          CD4011BM96
          絲?。?a target="_blank" title="Marking" href="/cd4011bm/marking.html">CD4011BM；Package：SOIC；CMOS NAND GATES
          
Features:
 Propagation delay time = 60 ns (typ.) at
CL =50 pF, Vpp = 10V
= Buffered inputs and outputs
= Standardized symmetrical output characteristics
 Maximum input current of 1 uA at 18 V
over full package temperature range;
100 nA at 18 V and 25°C
= 100% tested for quiescent curre
          文件：1.0201 Mbytes 頁數(shù)：23 Pages
          TI
          德州儀器
          

          CD4011BM96.A
          絲?。?a target="_blank" title="Marking" href="/cd4011bm/marking.html">CD4011BM；Package：SOIC；CMOS NAND GATES
          
Features:
 Propagation delay time = 60 ns (typ.) at
CL =50 pF, Vpp = 10V
= Buffered inputs and outputs
= Standardized symmetrical output characteristics
 Maximum input current of 1 uA at 18 V
over full package temperature range;
100 nA at 18 V and 25°C
= 100% tested for quiescent curre
          文件：1.0201 Mbytes 頁數(shù)：23 Pages
          TI
          德州儀器
          

          CD4011BM96E4
          絲?。?a target="_blank" title="Marking" href="/cd4011bm/marking.html">CD4011BM；Package：SOIC；CMOS NAND GATES
          
Features:
 Propagation delay time = 60 ns (typ.) at
CL =50 pF, Vpp = 10V
= Buffered inputs and outputs
= Standardized symmetrical output characteristics
 Maximum input current of 1 uA at 18 V
over full package temperature range;
100 nA at 18 V and 25°C
= 100% tested for quiescent curre
          文件：1.0201 Mbytes 頁數(shù)：23 Pages
          TI
          德州儀器
          

          
            
          
		
        
          
            
          
                
          替換型號
          
            
          
            
            
        
          
		
        
          
            
          
                
          技術(shù)參數(shù)
          
            
          
            
            
            	
          • Supply voltage (Min) (V)：
            3
          • Supply voltage (Max) (V)：
            18
          • Number of channels (#)：
            4
          • Inputs per channel：
            2
          • IOL (Max) (mA)：
            6.8
          • IOH (Max) (mA)：
            -6.8
          • Input type：
            Standard CMOS
          • Output type：
            Push-Pull
          • Features：
            Standard speed (tpd > 50ns)
          • Data rate (Max) (Mbps)：
            8
          • Rating：
            Catalog
          
            
          
        
          
            
          供應(yīng)商型號品牌批號封裝庫存備注價格
          
                
          



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            更新時間2026-1-18 16:10:00
        
          
        
          
          
          
            
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