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          首頁 >絲印反查>CD4011B

          型號(hào)下載 訂購功能描述制造商 上傳企業(yè)LOGO

          CD4011BNSR

          絲?。?strong>CD4011B;Package:SOP;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          CD4011BNSR.A

          絲?。?strong>CD4011B;Package:SOP;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          CD4011BE

          絲印:CD4011BE;Package:PDIP;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          CD4011BE.A

          絲?。?a target="_blank" title="Marking" href="/cd4011be/marking.html">CD4011BE;Package:PDIP;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          CD4011BEE4

          絲?。?a target="_blank" title="Marking" href="/cd4011be/marking.html">CD4011BE;Package:PDIP;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          CD4011BF

          絲印:CD4011BF;Package:CDIP;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          CD4011BF.A

          絲?。?a target="_blank" title="Marking" href="/cd4011bf/marking.html">CD4011BF;Package:CDIP;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          CD4011BF3A

          絲?。?a target="_blank" title="Marking" href="/cd4011bf3a/marking.html">CD4011BF3A;Package:CDIP;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          CD4011BF3A.A

          絲印:CD4011BF3A;Package:CDIP;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          CD4011BM

          絲?。?a target="_blank" title="Marking" href="/cd4011bm/marking.html">CD4011BM;Package:SOIC;CMOS NAND GATES

          Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

          文件:1.0201 Mbytes 頁數(shù):23 Pages

          TI

          德州儀器

          供應(yīng)商型號(hào)品牌批號(hào)封裝庫存備注價(jià)格
          TexasInstruments
          18+
          ICQUAD2INNANDGATE14SO
          6580
          公司原裝現(xiàn)貨/歡迎來電咨詢!
          詢價(jià)
          TI
          25+
          SOP-14
          4000
          就找我吧!--邀您體驗(yàn)愉快問購元件!
          詢價(jià)
          TI
          22+
          14SOIC
          9000
          原廠渠道,現(xiàn)貨配單
          詢價(jià)
          TI
          23+
          14-SO
          3115
          正品原裝貨價(jià)格低
          詢價(jià)
          TI/德州儀器
          23+
          SOP14
          50000
          全新原裝正品現(xiàn)貨,支持訂貨
          詢價(jià)
          恩XP
          2016+
          DIP14
          2500
          只做原裝,假一罰十,公司可開17%增值稅發(fā)票!
          詢價(jià)
          TI
          24+
          DIP-14
          30000
          原裝正品公司現(xiàn)貨,假一賠十!
          詢價(jià)
          TI
          24+
          DIP-14
          6000
          全新原裝深圳倉庫現(xiàn)貨有單必成
          詢價(jià)
          TI
          2022+
          DIP-14
          7600
          原廠原裝,假一罰十
          詢價(jià)
          TI
          21+
          DIP-14
          10000
          只做原裝,質(zhì)量保證
          詢價(jià)
          更多CD4011B供應(yīng)商 更新時(shí)間2026-1-18 15:14:00
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