CMOS 8-Stage Presettable Synchronous Down Counters

Description CD40102BMS and CD40103BMS consist of an 8-stage synchronous down counter with a single output which is active when the internal count is zero. The CD40102BMS is config ured as two cascaded 4-bit BCD counters, and the CD40103BMS contains a single 8-bit binary counter. Each type has c

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INTERSIL

CMOS 8-Stage Presettable Synchronous Down Counters

Description\nCD40102BMS and CD40103BMS consist of an 8-stage synchronous down counter with a single output which is active when the internal count is zero. The CD40102BMS is config ured as two cascaded 4-bit BCD counters, and the CD40103BMS contains a single 8-bit binary counter. Each type has contr ? High Voltage Type (20V Rating)\n? CD40102BMS: 2-Decade BCD Type\n? CD40103BMS: 8-Bit Binary Type\n? Synchronous or Asynchronous Preset\n? Medium Speed Operation\n?? - fCL = 3.6MHz (Typ) at 10V\n? Cascadable\n? 100% Tested for Quiescent Current at 20V\n? Maximum Input Current of 1μA at 18V Over;

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瑞薩

CMOS 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS

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TI

德州儀器

CMOS 8-stage Presettable Synchronous Down Counters

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TI

德州儀器

CMOS 8-Stage Presettable Synchronous Down Counters

Features: . Synchronous or asynchronous preset . Medium-speed operation: fc = 3.6 MHz {typ.) @ Vpp = 10 V Cascadable 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18-V over full package-temperature range; 100 nA at 18 V and 25°C Noise margin (full pac

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TI

德州儀器