Cascadable Amplifier 5 to 500 MHz

Description The A5 RF amplifier is a discrete hybrid design, which uses thin film manufacturing processes for accurate performance and high reliability. This single stage bipolar transistor feedback amplifier design displays impressive performance over a broadband frequency range. Both TO-8 and

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MACOM

EMI/EMC FILTER

Features - Remarkable attenuation for high voltage impulse - Good shield effect by using metal case - Excellent filtering characteristics for both differential mode and common mode - Bidirectional structure effective for both noise from outside and internally generated Applications - Digit

文件：1.09128 Mbytes 頁數(shù)：2 Pages

DIT

絲?。?strong>CA5；Package：SOD-323；Transient Voltage Suppressors for ESD Protection

Feature 252 Watts Peak Pulse Power per Line (tp=8/20μs) Protects one Bidirectional I/O line Low Clamping Voltage Working voltages: 5.0V Low leakage current IEC61000-4-2(ESD) ±30 kV (air discharge)， ±30 kV (contact discharge); IEC61000-4-4 (EFT) 40A (5/50ηs) IEC61000-4-5 (LIGHTING) 12A (8/

文件：858.54 Kbytes 頁數(shù)：4 Pages

UNSEMI

優(yōu)恩半導(dǎo)體

絲?。?strong>CA5；Package：SOD-323；Transient Voltage Suppressors for ESD Protection

Feature Moisture Sensitivity Level (MSL -1) AEC-Q101 qualified 250 Watts Peak Pulse Power per Line (tp=8/20μs) Protects one bidirectional I/O line Low Clamping Voltage Working Voltage: 5.0V Low leakage current IEC61000-4-4 (EFT): 40A (5/50ηs) IEC61000-4-5 (Lightning): 12A (8/20μs) IEC610

文件：2.18884 Mbytes 頁數(shù)：4 Pages

UNSEMI

優(yōu)恩半導(dǎo)體

絲印：CA5；Package：SC70(DCK)；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1? Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch ? Supports 5-V VCC Operation ? Inputs Accept Voltages to 5.5 V ? Provides Down Translation to VCC ? Max t pd of 3.8 ns at 3.3 V ? Low Power Consumption, 10-μA Max ICC ? ±24-mA Output Drive at 3.3 V ? Ioff S

文件：2.25185 Mbytes 頁數(shù)：44 Pages

TI

德州儀器

絲?。?strong>CA5；Package：SC70(DCK)；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1? Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch ? Supports 5-V VCC Operation ? Inputs Accept Voltages to 5.5 V ? Provides Down Translation to VCC ? Max t pd of 3.8 ns at 3.3 V ? Low Power Consumption, 10-μA Max ICC ? ±24-mA Output Drive at 3.3 V ? Ioff S

文件：2.25185 Mbytes 頁數(shù)：44 Pages

TI

德州儀器

絲?。?strong>CA5；Package：SC70(DCK)；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1? Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch ? Supports 5-V VCC Operation ? Inputs Accept Voltages to 5.5 V ? Provides Down Translation to VCC ? Max t pd of 3.8 ns at 3.3 V ? Low Power Consumption, 10-μA Max ICC ? ±24-mA Output Drive at 3.3 V ? Ioff S

文件：2.25185 Mbytes 頁數(shù)：44 Pages

TI

德州儀器

絲?。?strong>CA5；Package：SC70(DCK)；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1? Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch ? Supports 5-V VCC Operation ? Inputs Accept Voltages to 5.5 V ? Provides Down Translation to VCC ? Max t pd of 3.8 ns at 3.3 V ? Low Power Consumption, 10-μA Max ICC ? ±24-mA Output Drive at 3.3 V ? Ioff S

文件：2.25185 Mbytes 頁數(shù)：44 Pages

TI

德州儀器

絲印：CA5；Package：SC70(DCK)；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1? Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch ? Supports 5-V VCC Operation ? Inputs Accept Voltages to 5.5 V ? Provides Down Translation to VCC ? Max t pd of 3.8 ns at 3.3 V ? Low Power Consumption, 10-μA Max ICC ? ±24-mA Output Drive at 3.3 V ? Ioff S

文件：2.25185 Mbytes 頁數(shù)：44 Pages

TI

德州儀器

絲?。?strong>CA5；Package：SC70(DCK)；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1? Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch ? Supports 5-V VCC Operation ? Inputs Accept Voltages to 5.5 V ? Provides Down Translation to VCC ? Max t pd of 3.8 ns at 3.3 V ? Low Power Consumption, 10-μA Max ICC ? ±24-mA Output Drive at 3.3 V ? Ioff S

文件：2.25185 Mbytes 頁數(shù)：44 Pages

TI

德州儀器