ECL/PECL 1:9 Differential Clock Driver

DESCRIPTION The AZ10/100E111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The IN signal is fanned-out to nine identical differential outputs. An Enable input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Qˉ outputs HIGH.

文件：91.66 Kbytes 頁數(shù)：6 Pages

AZM

1:9 Differential Clock Driver

[ARIZONA MICROTEK, INC.] DESCRIPTION The AZ10E/100E111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. It accepts one signal input, which can be either differential or single-ended if the VBB output is used. The signal is fanned-out to 9 identical differential

文件：64.91 Kbytes 頁數(shù)：2 Pages

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ECL/PECL 1:9 Differential Clock Driver

DESCRIPTION The AZ10/100E111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The IN signal is fanned-out to nine identical differential outputs. An Enable input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Qˉ outputs HIGH.

文件：91.66 Kbytes 頁數(shù)：6 Pages

AZM

4.2 V-5.46 V, ECL/PECL 1:9 differential clock driver

Arizona