AM654x, AM652x Sitara? Processors Silicon Revision 2.1

1 Features Processor cores: ? Dual- or quad-core Arm? Cortex?-A53 microprocessor subsystem at up to 1.1 GHz – Up to two dual-core or two single-core Arm? Cortex?-A53 clusters with 512KB L2 cache including SECDED – Each A53 core has 32KB L1 ICache and 32K L1 DCache ? Dual-core Arm? Cortex?

文件：6.84172 Mbytes 頁數：284 Pages

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德州儀器

Sitara Processors

文件：3.37106 Mbytes 頁數：299 Pages

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德州儀器

Processors Silicon Revision 1.0

文件：4.08534 Mbytes 頁數：277 Pages

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德州儀器

具有千兆位 PRU-ICSS 的四核 Arm? Cortex?-A53 和雙核 Arm Cortex-R5F Sitara? 處理器

AM654x and AM652x Sitara Arm applications processors are built to meet the complexprocessing needs of modern industrial embedded products.\nThe AM654x and AM652x devices combine four or two Arm Cortex-A53 cores with a dualCortex-R5F MCU subsystem which includes features intended to help customers ac ? 處理器內核：\n? 每個 A53 內核具有 32KB L1 指令緩存和 32K L1 數據緩存\n? 每個 R5F 內核具有 16KB 指令緩存、16KB 數據緩存和 64KB RAM\n? 三個千兆位工業(yè)通信子系統(tǒng) (PRU_ICSSG) \n? 支持兩個 SGMII 端口? \n? 每個 PRU_ICSSG 具有 24 個 PWM\n? 增強跳閘控制 \n? 每個 PRU_ICSSG 具有 18 個 Σ-Δ 濾波器\n? 過流邏輯 \n? 每個 PRU_ICSSG 具有 6 個多協議位置編碼器接口\n? 高達 2MB 的片上 L3 RAM（具有 SECDED）\n? 共享相干 3 級緩;

TI

德州儀器

AM654x, AM652x Sitara? Processors Silicon Revision 2.1

1 Features Processor cores: ? Dual- or quad-core Arm? Cortex?-A53 microprocessor subsystem at up to 1.1 GHz – Up to two dual-core or two single-core Arm? Cortex?-A53 clusters with 512KB L2 cache including SECDED – Each A53 core has 32KB L1 ICache and 32K L1 DCache ? Dual-core Arm? Cortex?

文件：6.84172 Mbytes 頁數：284 Pages

TI

德州儀器

絲印：AM6546BACDXA；Package：FCBGA；AM654x, AM652x Sitara? Processors Silicon Revision 2.1

1 Features Processor cores: ? Dual- or quad-core Arm? Cortex?-A53 microprocessor subsystem at up to 1.1 GHz – Up to two dual-core or two single-core Arm? Cortex?-A53 clusters with 512KB L2 cache including SECDED – Each A53 core has 32KB L1 ICache and 32K L1 DCache ? Dual-core Arm? Cortex?

文件：6.84172 Mbytes 頁數：284 Pages

TI

德州儀器