AM62Ax Sitara? Processors

1 Features Processor Cores: ? Up to Quad Arm? Cortex?-A53 microprocessor subsystem at up to 1.4 GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection ? Single-core Arm? Cor

文件：4.17993 Mbytes 頁(yè)數(shù)：218 Pages

TI

德州儀器

AM62Ax Sitara? Processors

1 Features Processor Cores: Up to Quad 64-bit Arm? Cortex?-A53 microprocessor subsystem at up to 1.4 GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection Single-core Arm?

文件：4.39032 Mbytes 頁(yè)數(shù)：238 Pages

TI

德州儀器

AM62Ax Sitara? Processors

1 Features Processor Cores: ? Up to Quad 64-bit Arm? Cortex?-A53 microprocessor subsystem at up to 1.4 GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection ? Single-core A

文件：4.39215 Mbytes 頁(yè)數(shù)：238 Pages

TI

德州儀器

AM62Ax Sitara? Processors

1 Features Processor Cores: ? Up to Quad 64-bit Arm? Cortex?-A53 microprocessor subsystem at up to 1.4 GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection ? Single-core A

文件：4.35701 Mbytes 頁(yè)數(shù)：237 Pages

TI

德州儀器

AM62Ax Sitara? Processors

1 Features Processor Cores: ? Up to Quad 64-bit Arm? Cortex?-A53 microprocessor subsystem at up to 1.4GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection ? Single-core Ar

文件：4.50649 Mbytes 頁(yè)數(shù)：248 Pages

TI

德州儀器

AM62Ax Sitara? Processors

1 Features Processor Cores: ? Up to Quad 64-bit Arm? Cortex?-A53 microprocessor subsystem at up to 1.4GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection ? Single-core Ar

文件：5.12909 Mbytes 頁(yè)數(shù)：247 Pages

TI

德州儀器

適用于 1-2 個(gè)攝像頭、低功耗系統(tǒng)、視頻監(jiān)控、零售自動(dòng)化且具有 RGB-IR ISP 的 1TOPS 視覺(jué) SoC

AM62Ax 是 Sitara? 汽車(chē)級(jí)異構(gòu) Arm? 處理器系列的擴(kuò)展，具有嵌入式深度學(xué)習(xí)(DL)、視頻和視覺(jué)處理加速、顯示接口及廣泛的汽車(chē)外設(shè)和網(wǎng)絡(luò)選項(xiàng)。AM62Ax 專(zhuān)為一系列成本敏感型汽車(chē)應(yīng)用（包括駕駛員和車(chē)內(nèi)監(jiān)控系統(tǒng)與下一代電子后視鏡系統(tǒng)）以及工廠(chǎng)自動(dòng)化、樓宇自動(dòng)化、機(jī)器人和其他市場(chǎng)中的廣泛工業(yè)應(yīng)用而構(gòu)建。AM62Ax 對(duì)成本進(jìn)行了優(yōu)化，能夠以業(yè)界卓越的功耗/性能比為傳統(tǒng)和深度學(xué)習(xí)算法提供高性能計(jì)算，并具有很高的系統(tǒng)集成度，從而使支持獨(dú)立電子控制單元 (ECU) 中多種傳感器模式的高級(jí)汽車(chē)平臺(tái)實(shí)現(xiàn)可擴(kuò)展性和更低的成本。\n\nAM62Ax 包含多達(dá)四個(gè)具有 64 位架構(gòu)的 Arm? Processor Cores: \n? Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC\n? Single-core Arm Cortex-R5F at up to 800 MHz, integrated as part of MCU Channel with FFI \n? 512KB SRAM with SECDED ECC\n? Single-core Arm Cortex-R5F at up to 800 MHz, integrated to support Device Managem;

TI

德州儀器

AM62Ax Sitara? Processors

1 Features Processor Cores: ? Up to Quad Arm? Cortex?-A53 microprocessor subsystem at up to 1.4 GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection ? Single-core Arm? Cor

文件：4.17993 Mbytes 頁(yè)數(shù)：218 Pages

TI

德州儀器

AM62Ax Sitara? Processors

1 Features Processor Cores: Up to Quad 64-bit Arm? Cortex?-A53 microprocessor subsystem at up to 1.4 GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection Single-core Arm?

文件：4.39032 Mbytes 頁(yè)數(shù)：238 Pages

TI

德州儀器

AM62Ax Sitara? Processors

1 Features Processor Cores: Up to Quad 64-bit Arm? Cortex?-A53 microprocessor subsystem at up to 1.4 GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection Single-core Arm?

文件：4.39032 Mbytes 頁(yè)數(shù)：238 Pages

TI

德州儀器