Sitara Processors

文件：3.23065 Mbytes 頁數(shù)：252 Pages

TI

德州儀器

AM335x ARM Cortex-A8 Microprocessors (MPUs)

文件：2.69316 Mbytes 頁數(shù)：222 Pages

TI

德州儀器

Sitara 處理器：Arm Cortex-A8、1Gb 以太網(wǎng)、支持顯示效果、CAN

AM335x 微處理器基于 ARM Cortex-A8 處理器，在圖像、圖形處理、外設以及 EtherCAT 和 PROFIBUS 等工業(yè)接口選項方面得到了增強。該器件支持高級操作系統(tǒng) (HLOS)。處理器 SDK Linux?和 TI-RTOS 可從德州儀器 (TI) 免費獲取。\n\nAM335x 微處理器包含功能框圖中顯示的子系統(tǒng)，并簡要介紹了 簡要 說明：\n\n包含功能框圖中顯示的子系統(tǒng)，并簡要介紹了 簡要 說明：\n\n微處理器單元 (MPU) 子系統(tǒng)基于 ARM Cortex-A8 處理器， PowerVR SGX?圖形加速器子系統(tǒng)提供 3D 圖形加速功能以支持顯示和游戲特效。\ ? 高達 1GHz Sitara? ARM? Cortex?-A8 32 位精簡指令集計算機 (RISC) 處理器 \n? 32KB L1 指令和 32KB 帶有單位檢錯（奇偶校驗）的數(shù)據(jù)緩存\n? 176KB 片載啟動 ROM\n? 仿真和調(diào)試 - JTAG\n? 片上存儲器（共享 L3 RAM） \n? 可訪問所有主機\n? 外部存儲器接口 (EMIF) \n? mDDR：200MHz 時鐘（400MHz 數(shù)據(jù)速率）\n? DDR3：400MHz 時鐘（800MHz 數(shù)據(jù)速率）\n? 16 位數(shù)據(jù)總線\n? 支持一個 x16 或兩個 x8 存儲器件配置\n? 通用存儲器控制器 (GPMC);

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/am3352bzce30/marking.html">AM3352BZCE30；Package：NFBGA；AM335x Sitara? Processors

1.1 Features 1 ? Up to 1-GHz Sitara? ARM? Cortex?-A8 32?Bit RISC Processor – NEON? SIMD Coprocessor – 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity) – 256KB of L2 Cache With Error Correcting Code (ECC) – 176KB of On-Chip Boot ROM – 64KB of Dedicated RAM

文件：3.66231 Mbytes 頁數(shù)：256 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/am3352bzce30/marking.html">AM3352BZCE30；Package：NFBGA；AM335x Sitara? Processors

1.1 Features 1 ? Up to 1-GHz Sitara? ARM? Cortex?-A8 32?Bit RISC Processor – NEON? SIMD Coprocessor – 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity) – 256KB of L2 Cache With Error Correcting Code (ECC) – 176KB of On-Chip Boot ROM – 64KB of Dedicated RAM

文件：3.66231 Mbytes 頁數(shù)：256 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/am3352bzce60/marking.html">AM3352BZCE60；Package：NFBGA；AM335x Sitara? Processors

1.1 Features 1 ? Up to 1-GHz Sitara? ARM? Cortex?-A8 32?Bit RISC Processor – NEON? SIMD Coprocessor – 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity) – 256KB of L2 Cache With Error Correcting Code (ECC) – 176KB of On-Chip Boot ROM – 64KB of Dedicated RAM

文件：3.66231 Mbytes 頁數(shù)：256 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/am3352bzcea30/marking.html">AM3352BZCEA30；Package：NFBGA；AM335x Sitara? Processors

1.1 Features 1 ? Up to 1-GHz Sitara? ARM? Cortex?-A8 32?Bit RISC Processor – NEON? SIMD Coprocessor – 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity) – 256KB of L2 Cache With Error Correcting Code (ECC) – 176KB of On-Chip Boot ROM – 64KB of Dedicated RAM

文件：3.66231 Mbytes 頁數(shù)：256 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/am3352bzcea30/marking.html">AM3352BZCEA30；Package：NFBGA；AM335x Sitara? Processors

1.1 Features 1 ? Up to 1-GHz Sitara? ARM? Cortex?-A8 32?Bit RISC Processor – NEON? SIMD Coprocessor – 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity) – 256KB of L2 Cache With Error Correcting Code (ECC) – 176KB of On-Chip Boot ROM – 64KB of Dedicated RAM

文件：3.66231 Mbytes 頁數(shù)：256 Pages

TI

德州儀器

絲印：AM3352BZCEA60；Package：NFBGA；AM335x Sitara? Processors

1.1 Features 1 ? Up to 1-GHz Sitara? ARM? Cortex?-A8 32?Bit RISC Processor – NEON? SIMD Coprocessor – 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity) – 256KB of L2 Cache With Error Correcting Code (ECC) – 176KB of On-Chip Boot ROM – 64KB of Dedicated RAM

文件：3.66231 Mbytes 頁數(shù)：256 Pages

TI

德州儀器

絲印：AM3352BZCEA60；Package：NFBGA；AM335x Sitara? Processors

1.1 Features 1 ? Up to 1-GHz Sitara? ARM? Cortex?-A8 32?Bit RISC Processor – NEON? SIMD Coprocessor – 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity) – 256KB of L2 Cache With Error Correcting Code (ECC) – 176KB of On-Chip Boot ROM – 64KB of Dedicated RAM

文件：3.66231 Mbytes 頁數(shù)：256 Pages

TI

德州儀器