AM263Px Sitara? Microcontrollers

1 Features Processor Cores: ? Single, dual, and quad-core Arm? Cortex?-R5F MCU with each core running up to 400 MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – 256KB Tightly-Coupled Memory (TCM) with 32- bit ECC per CPU core cluster – Lockstep

文件：2.98809 Mbytes 頁(yè)數(shù)：154 Pages

TI

德州儀器

AM263Px Sitara? Microcontrollers with Optional Flash-in-Package

1 Features Processor Cores: ? Single, dual, and quad-core Arm? Cortex?-R5F MCU with each core running up to 400MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – x256 integrated VIM per CPU Core – 256KB Tightly-Coupled Memory (TCM) with 32- bit EC

文件：4.32235 Mbytes 頁(yè)數(shù)：164 Pages

TI

德州儀器

AM263Px Sitara? Microcontrollers with Optional Flash-in-Package

1 Features Processor Cores: ? Single, dual, and quad-core Arm? Cortex?-R5F MCU with each core running up to 400MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – x256 integrated VIM per CPU Core – 256KB Tightly-Coupled Memory (TCM) with 32- bit EC

文件：4.32276 Mbytes 頁(yè)數(shù)：164 Pages

TI

德州儀器

AM263Px Sitara? Microcontrollers with Optional Flash-in-Package

1 Features Processor Cores: ? Single, dual, and quad-core Arm? Cortex?-R5F MCU with each core running up to 400MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – x256 integrated VIM per CPU Core – 256KB Tightly-Coupled Memory (TCM) with 32- bit EC

文件：4.110439 Mbytes 頁(yè)數(shù)：168 Pages

TI

德州儀器

Automotive quad-core Arm? Cortex?-R5F MCU up to 400 MHz with real-time control and expand

AM263Px Sitara? Arm? 微控制器旨在滿足下一代工業(yè)和汽車嵌入式產(chǎn)品復(fù)雜的實(shí)時(shí)處理需求。AM263Px MCU 系列包含多個(gè)具有多達(dá)四個(gè) 400MHz Arm? Cortex?-R5F 內(nèi)核的引腳對(duì)引腳兼容器件?？蛇x擇將 Arm? R5F 子系統(tǒng)編程為在鎖步或雙核模式下運(yùn)行，從而實(shí)現(xiàn)多種功能安全配置。工業(yè)通信子系統(tǒng) (PRU-ICSS) 支持集成工業(yè)以太網(wǎng)通信協(xié)議（例如 PROFINET?、TSN、Ethernet/IP?、EtherCAT? 以及多個(gè)其他協(xié)議）、標(biāo)準(zhǔn)以太網(wǎng)連接和自定義 I/O 接口。該系列面向使用高級(jí)模擬感應(yīng)和數(shù)字驅(qū)動(dòng)模塊的未來(lái)電機(jī)控制和數(shù)字電源應(yīng)用而設(shè)計(jì)。\ 處理器內(nèi)核： \n? 16KB 指令緩存，每個(gè) CPU 內(nèi)核具有 64 位 ECC\n? 256KB 緊耦合存儲(chǔ)器 (TCM)，每個(gè) CPU 內(nèi)核集群具有 32 位 ECC\n? 用于加速三角函數(shù)的三角函數(shù)加速器 (TMU) \n? 3MB 片上 RAM (OCSRAM) \n? ECC 錯(cuò)誤保護(hù)\n? 用于外部存儲(chǔ)器的遠(yuǎn)程 L2 高速緩存，軟件可編程，每個(gè) CPU 內(nèi)核高達(dá) 128KB\n? 1 個(gè) EDMA，支持?jǐn)?shù)據(jù)移動(dòng)功能\n? UART（主/備）\n? OSPI NOR 閃存（8S 50MHz SDR Mode0，8S 25MHz DDR XSPI)（主要)\n? 處理器間通信模塊 \;

TI

德州儀器