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          型號下載 訂購功能描述制造商 上傳企業(yè)LOGO

          74AUP2G132DC

          絲?。?strong>aE2;Package:SOT765-1;Low-power dual 2-input NAND Schmitt trigger

          1. General description The 74AUP2G132 is a dual 2-input NAND gate with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IO

          文件:309.84 Kbytes 頁數:21 Pages

          NEXPERIA

          安世

          74AUP2G132GT

          絲印:aE2;Package:SOT833-1;Low-power dual 2-input NAND Schmitt trigger

          1. General description The 74AUP2G132 is a dual 2-input NAND gate with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IO

          文件:309.84 Kbytes 頁數:21 Pages

          NEXPERIA

          安世

          SMBJ60A

          絲?。?strong>AE2;Package:SMB;600 W Transient Voltage Suppressor

          1. General description 600 W uni- and bi-directional Transient Voltage Suppressor (TVS) in a SMB Surface-Mounted Device (SMD) plastic package, designed for transient voltage protection. 2. Features and benefits ? Rated peak pulse power at 10/1000 μs waveform: PPPM = 600 W ? Reverse standoff

          文件:229.55 Kbytes 頁數:12 Pages

          NEXPERIA

          安世

          74AC11240DBR

          絲印:AE240;Package:SSOP;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

          Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small-

          文件:420.85 Kbytes 頁數:16 Pages

          TI

          德州儀器

          74AC11240DBR.A

          絲?。?a target="_blank" title="Marking" href="/ae240/marking.html">AE240;Package:SSOP;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

          Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small-

          文件:420.85 Kbytes 頁數:16 Pages

          TI

          德州儀器

          74AC11240PW

          絲印:AE240;Package:TSSOP;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

          Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small-

          文件:420.85 Kbytes 頁數:16 Pages

          TI

          德州儀器

          74AC11240PW.A

          絲?。?a target="_blank" title="Marking" href="/ae240/marking.html">AE240;Package:TSSOP;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

          Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small-

          文件:420.85 Kbytes 頁數:16 Pages

          TI

          德州儀器

          74AC11244DBR

          絲?。?a target="_blank" title="Marking" href="/ae244/marking.html">AE244;Package:SSOP;OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

          EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

          文件:412.15 Kbytes 頁數:15 Pages

          TI

          德州儀器

          74AC11244DBR.A

          絲印:AE244;Package:SSOP;OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

          EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

          文件:412.15 Kbytes 頁數:15 Pages

          TI

          德州儀器

          74AC11244PW

          絲?。?a target="_blank" title="Marking" href="/ae244/marking.html">AE244;Package:TSSOP;OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

          EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

          文件:412.15 Kbytes 頁數:15 Pages

          TI

          德州儀器

          詳細參數

          • 型號:

            AE2

          • 功能描述:

            邏輯門 1.8V 2-INPUT NAND

          • RoHS:

          • 制造商:

            Texas Instruments

          • 產品:

            OR

          • 邏輯系列:

            LVC

          • 柵極數量:

            2

          • 線路數量(輸入/輸出):

            2/1

          • 高電平輸出電流:

            - 16 mA

          • 低電平輸出電流:

            16 mA

          • 傳播延遲時間:

            3.8 ns

          • 電源電壓-最大:

            5.5 V

          • 電源電壓-最?。?/span>

            1.65 V

          • 最大工作溫度:

            + 125 C

          • 安裝風格:

            SMD/SMT

          • 封裝/箱體:

            DCU-8

          • 封裝:

            Reel

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          更多AE2供應商 更新時間2026-1-18 22:59:00
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